Product Engineer II (DDR IP)

About the role

Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wider range of customers. This is a tremendous opportunity to work with an experienced team focusing on development and support of high-performance IP related to memory protocols such as DDR/LPDDR/HBM/GDDR. You will be a key member of technical staff responsible for pre-sales engagement with potential customers and post-sales technical support for integration, usage, and deployment of memory physical IP products. This role serves as the primary interface between customers, Cadence R&D, and System Validation teams.

Strong communication skills, the ability to manage multiple priorities, ownership of tasks, collaboration with remote global teams, and clear oral and written communication are essential for success in this position.

Responsibilities

• Support pre-silicon integration, usage, and implementation of memory subsystem products
• Assist with internal system integration and QA testing of memory subsystem products (Controller + PHY)
• Analyze and resolve complex subsystem application or implementation issues, providing professional guidance to customers
• Support memory PHY and controller SOC integration reviews and implementation reviews
• Assist customers with RTL and gate-level simulations to verify functionality
• Help customers with timing closure and other aspects of physical integration
• Participate in development and refinement of product documentation and checklists for customer applications
• Support post-silicon bringup and production test activities for customers as needed
• Enhance customer experience by providing prompt, thorough, and technically accurate responses to customer questions
• Leverage AI-powered tools and assistants to enhance productivity, improve decision-making, and maintain high-quality customer deliverables
• Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets

Requirements

• B.S. in Electrical/Computer Engineering (or similar degree) with a minimum of 2 years of relevant industry experience OR M.S. in Electrical/Computer Engineering (or similar degree)
• Experience working with DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6, or similar IPs
• Verilog RTL design and gate-level verification experience
• Synthesis and static timing analysis experience (physical implementation/verification experience is a plus)
• Familiarity with industry-standard DFT flows and test methodologies
• Familiarity with package and board design
• Ability to read schematics and participate in SI/PI reviews for customer board/package implementation

Preferred Qualifications

• M.S. in Electrical/Computer Engineering (or similar degree) with 2+ years of relevant industry experience
• Experience with Memory PHY and DSP-based architecture
• Experience with embedded microcontroller firmware

Location: Nanjing or Shanghai