Jobs · Information Technology · California

Principal Engineer, Serdes Analog Design

Samsung Semiconductor · San Jose, CA · 5 days ago
Information Technology$219k–$351k/yrFull-time

Advancing the world’s technology together, our solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you’ll have the opportunity to be part of a global leader whose innovative designs push the boundaries of what’s possible and power the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce, empowering people to be their true selves while building a better tomorrow for employees, customers, partners, and communities.

About the role

As a Senior Manager, Serdes Analog Design within Advanced Circuit and Systems (ACAS), you will actively work on the architecture and circuits of high-speed interconnect transceivers (Serdes). You will help define circuits and architecture for Serdes IPs, clock generation, and traditional analog circuits. You’ll supervise designers to deliver complete designs and support silicon validation and debugging. Collaborating with a team, you’ll develop high-performance, low-power Serdes, including display interfaces, camera sensor interfaces, UCIe/die-to-die interconnect, and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies.

Location: Onsite at our San Jose office 5 days a week.

Responsibilities

  • Define architecture and circuits for Serdes projects.
  • Supervise designers to complete projects and conduct silicon validation.
  • Hands-on circuit design, including low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies.
  • Translate component design specifications into schematics.
  • Build simulation test-benches to evaluate circuit performance, functionality, power consumption, and reliability.
  • Supervise layout of the complete project and optimize it to improve power consumption and performance.

Requirements

  • Bachelor’s degree with 20+ years, Master’s with 18+ years, or PhD with 15+ years of experience.
  • Minimum 7+ years of Analog/Serdes SoC design experience.
  • Knowledge and experience with analog circuits/mixed-signal circuits, such as bandgap, LDO, and filters.
  • Knowledge and experience with Serdes IP circuits: CTLE, DFE, FFE, clock distributions, PI, IQ generation.
  • Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe).
  • Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a plus.
  • Proficiency in EDA tools (Cadence, Spectre, Totem, EMX).
  • Comfortable with scripting languages (Python, Matlab).

Skills

  • Inclusive, adapting your style to diverse global norms.
  • Avid learner, approaching challenges with curiosity and resilience.
  • Collaborative, building relationships and humbly offering support.
  • Innovative and creative, proactively exploring new ideas and adapting to change.

Benefits

  • Medical, dental, vision, and 401k benefits.
  • Charitable giving match and community involvement opportunities.
  • 4+ weeks of paid time off annually, plus holidays and sick leave.
  • Family care support, including fertility/adoption stipends, medical travel, and virtual vet care.
  • Emotional wellness support via on-demand apps and free confidential therapy.
  • Onsite café and gym, plus virtual fitness classes.
  • Flexible environment to balance work and personal life.

Pay

Base pay range: $219,000—$351,000 USD. Incentive opportunities reward employees based on individual and company performance.

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