Principal Analog IC Design Engineer, High Speed SerDes

About the role

The Principal Analog IC Designer is responsible for the design and development of analog/mixed-signal IC circuit blocks from initial concept and specification through final verification of conformance to customer specifications.

Requirements

• Minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development
• Thorough understanding of jitter and signal equalization techniques
• Proficient design experience in most of the following SerDes circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low-jitter PLL, High-Speed Clock Distribution, ADC and DAC, Bias and Bandgap, and Voltage Regulators
• Proficiency in using CAD tools for circuit simulation, layout, and physical verification
• Excellent problem-solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment

Qualifications

• MS or PhD in Electrical Engineering
• Working knowledge of common SerDes standards and their electrical requirements is a plus
• Cadence tool experience, lab test experience, and design experience at >10Gbps and in <28nm technologies are a plus

Pay

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation including bonus, equity, and benefits.

Benefits

• Paid vacation and paid holidays
• 401(k) plan with employer match
• Employee stock purchase plan
• A variety of medical, dental, and vision plan options