Packaging Module Equipment Development Engineer

Intel’s Advanced Packaging Technology Manufacturing (APTM) division develops and commercializes industry-leading semiconductor packaging technologies for mobile, edge, and hyperscale computing platforms. Within APTM, the Assembly Technology Development (ATD) team pioneers innovative package assembly solutions and scales them for high-volume manufacturing.

About the role

The Packaging Module Development Engineer will:

• Develop First Level/Second Level Interconnect (FLI/SLI), Thermal solutions (TIM1), and SMT/PCB technologies to support Intel's future packaging platforms.
• Collaborate with multifunctional and cross-organizational teams to optimize assembly processes for quality, reliability, cost, yield, productivity, and manufacturability.
• Innovate next-generation equipment, materials, and fabrication processes to enhance semiconductor packaging capabilities at scale.
• Manage projects to meet product development timelines.
• Apply formal education and judgment to solve technical problems.
• Provide sustaining support for equipment performance and process health in high-volume manufacturing.
• Respond promptly to foundry customer requests and events.

Ideal candidate profile

• Technical leadership, strategic planning, and critical thinking.
• Ability to coach and develop technical teams.
• Tolerance for ambiguity and adaptability in a dynamic environment.
• Flexibility in managing changing priorities and responsibilities.
• Experience leading teams in a highly matrixed organization.
• Initiative and ability to work independently.
• Strong communication, influencing, technical, and analytical skills.

This position requires regular onsite presence.

Qualifications

Minimum Qualifications

• PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Physics/Applied Physics, or a related STEM field with 6+ months of relevant experience.
• Minimum GPA of 3.5.
• At least one publication in a peer-reviewed technical journal.
• Must have the required degree prior to start date.
• Relevant experience and deep understanding in solid mechanics applying thermal mechanical coupling behaviors into degradation (Thermal Cycling impact).

Preferred Qualifications

• One or more years of experience in any of the following:
• Technology development, including familiarity with Statistical Process Control (SPC) and/or Design of Experiments (DOE).
• Delivering results for complex, time-critical technical projects.
• Semiconductor fabrication processes and technology.
• Previous related work experience in a semiconductor foundry.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Pay

Annual Salary Range for jobs which could be performed in the US: $133,800.00 - 188,890.00 USD. The range displayed reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Schedule

This role requires an on-site presence on Shift 1 (United States of America).

Primary location: US, Arizona, Phoenix.