Staff Design Verification Engineer, UAL and PCIe Subsystems

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

What You Can Expect

• Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers
• Contribute to the methodology behind such development
• Activities may include writing a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete
• Develop tests and tune the environment to achieve coverage goals
• Debug failures and work with designers to resolve issues
• Verify boot code and architect, develop, and maintain tools to streamline the design of state-of-the-art multi-core SoCs
• Transform the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment
• Unit and regression testing of software tools

What We're Looking For

• BS Computer Engineering, Electrical Engineering, or Computer Science with 5+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience)
• Experience with System Verilog, UVM
• Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment
• Experience with scripting language such as Python or Perl and EDA Verification tools
• Experience with Object-Oriented Design and implementation
• Good understanding of Linux O.S.
• Good programming skills desired, especially C++ and ARM assembly
• Understanding of networking protocols, a plus

Other Skills

• Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision
• Requires the ability to accept and work with differing opinions
• Cannot be a close-minded developer
• Must be able to learn on the fly and work in a fast-paced environment

Pay

Expected Base Pay Range (USD): 113,920 - 170,600, $ per annum

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.