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Jobs · Engineering · California

Sr. Physical Design Verification Engineer, Annapurna Labs

Amazon Web Services (AWS) · Cupertino, CA · 1 wk ago
EngineeringFull-time

About the role

As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for the design and optimization of Silicon and Hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers).

Responsibilities

  • Drive full chip floorplan, integration and physical verification sign-off and closure
  • Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (Calibre, IC Validator)
  • Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification, and Fill insertion
  • Debug and resolve physical verification issues in collaboration with layout and design teams
  • Interface with foundries for MT form, rule deck updates and violation waivers
  • Develop and maintain verification runsets and methodologies
  • Support technology file development and qualification
  • Fine tune cloud infrastructure to improve compute and storage utilization for physical design work.
  • Mentor junior engineers on physical verification methodologies and closure

Requirements

  • Experience in Python, Perl, or another scripting language
  • BS + 10yrs or MS + 7yrs in EE/CS, or related field
  • 5+ years in physical verification for advanced technology nodes
  • Expert knowledge of industry-standard physical verification tools (Calibre, IC Validator, PVS)
  • Strong understanding of semiconductor manufacturing processes and design rules
  • Proven track record of successful tape-outs
  • Strong communication and collaboration abilities
  • Design Flow Knowledge: Understanding of backend physical design flows (FC/Innovus)

Qualifications

  • Experience with integration and verification in advanced nodes [5nm or below]
  • Knowledge of custom and digital design flows
  • Expertise with DFM (Design for Manufacturing) methodologies
  • Expertise in reliability verification (ESD, EM, IR drop)
  • Background in layout design or custom IC development

Skills

  • Python, Perl, or another scripting language
  • Physical verification for advanced technology nodes
  • Industry-standard physical verification tools (Calibre, IC Validator, PVS)
  • Seamless understanding of semiconductor manufacturing processes and design rules
  • Successful tape-outs
  • Communication and collaboration abilities
  • Understanding of backend physical design flows (FC/Innovus)
  • DFM (Design for Manufacturing) methodologies
  • Reliability verification (ESD, EM, IR drop)
  • Layout design or custom IC development background

Benefits

Amazon offers comprehensive benefits including health insurance, 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

Pay

The base salary range for this position is $183,000.00 - $247,600.00 USD annually.

Schedule

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information.

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