Sr Dir, Product Mgmt

About the role

Renesas is defining the next generation of MPU platforms that will power some of the most demanding markets in embedded computing — Industrial automation, Physical AI and robotics, multi-modal AI, and the broad general-purpose embedded base. This is one of the most consequential functions inside the EPAIAP organization: it is where dozens of individually compelling requirements from application segments, key accounts, technology domains, and regions are turned into one platform family that is buildable, sellable, and defensible for a decade. We are looking for a Director / Sr. Director to build and lead the Platform team — the group of IP planners and solution definers who own the technical and commercial definition of the next-generation MPU platforms end to end. You will hire, develop, and lead a team spanning vision and multi-modal sub-systems, industrial and robotics solution planning, memory/DDR sub-system planning, performance benchmarking, and platform-wide planning. You will also be the person who sets the platform-level architecture, arbitrates the trade-offs no single domain owner can resolve alone, and represents the platform to executive leadership, Product Line leads, engineering, and key customers. This role reports into the Central Functions organization of the EPAIAP Business Division and works in close partnership with the Vision & Edge/Physical AI, Real-Time & Industrial Networking, and General Purpose Product Lines, as well as Pathfinding & Technical Assistant, Execution & PMO, and Edge AI/Product SW leadership.

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

Responsibilities

• Own the end-to-end definition of Renesas' next-generation MPU platform strategy — the family architecture, derivative and segmentation strategy, and the roadmap that must serve Industrial, Physical AI/robotics, multi-modal AI, and general-purpose embedded markets simultaneously.
• Build, lead, and grow the Platform team of IP planners and solution definers — today spanning industrial solution planning, robotics solution planning, DDR/memory sub-system planning, multi-modal/vision IP planning, performance benchmarking, and entry-level platform planning — hiring, mentoring, and setting the technical bar for the organization.
• Turn requirements arriving from Product Line leads, regional business teams, key accounts, and technology domain owners into one prioritized, traceable platform baseline — which means being able to say no to a legitimate ask, explain the reasoning in terms stakeholders respect, and keep the relationship intact afterward.
• Arbitrate resource allocation across the die: area, power, memory bandwidth, and schedule are finite, and every domain — vision, multi-modal/AI acceleration, industrial connectivity, memory, security — will ask for more than the budget allows. You frame the options, quantify the cost of each, and drive the decision.
• Set and enforce the team's standards for IP make-versus-buy-versus-license analysis, technical due diligence, and requirement sign-off, so every major IP decision across the platform is made with rigor and the reasoning is visible.
• Own the platform business case together with Finance and the Business Unit: volume and mix assumptions, cost and margin modeling, pricing structure, and lifecycle and longevity commitments.
• Own the platform-level security and functional safety strategy — secure boot, root of trust, key management, target standards and integrity levels, and the certification roadmap — and keep it aligned to where regulation and customer expectations are heading.
• Partner with engineering leadership (SoC/IP architecture, design, verification, physical implementation, software/BSP) on feasibility, budget consumption, and what the schedule and process node will actually support.
• Represent the platform strategy to executive leadership, at business and investment reviews, and directly to lead customers and field teams when the platform thesis needs defending in the room.
• Maintain the competitive and technology landscape view at the platform level — competing MPUs and SoCs, the ecosystems and software stacks customers evaluate alongside silicon, and where the next real inflection is coming from.

Collaboration

• With your team: IP planners and solution definers across vision/multi-modal, industrial, robotics, memory, and performance benchmarking — you set direction, unblock decisions, and are accountable for the quality and coherence of everything the team produces.
• With Product Line leads (Vision & Edge/Physical AI, Real-Time & Industrial Networking, General Purpose): translating segment and application requirements into the platform baseline, and negotiating what belongs in the base platform versus a derivative.
• With Central Functions peers: Pathfinding & Technical Assistant on future technology bets, Execution & PMO on schedule and delivery, and Edge AI/Product SW & Chief of Staff on software enablement and cross-organization alignment.
• With engineering, quality, security/functional safety, operations/supply chain, and finance: on feasibility, certification, reliability, cost, and the business case.
• Externally: IP and CPU vendors, ecosystem and software partners, and lead customers whose requirements ultimately have to be reflected — or knowingly traded off — in the platform you ship.

Requirements

• 12+ years of