Senior Verification Engineer

About the Role

Microsoft Azure is building the fastest network in the public cloud. We are seeking candidates who can span the stack from hardware to systems to applications, turning ideas into production systems at a rapid pace. Join us as a Design Verification Engineer to build the world's fastest public cloud and make a difference to millions of people across the planet.

Responsibilities

• Research and identify new tools for improving products, providing make-vs.-buy recommendations, and creating multiple complex product designs.
• Develop and implement technical solutions to complex quality and design challenges, cross-check silicon chip architecture, use performance instrumentation, and write performance simulators.
• Write complex test cases, execute test plans for complex features or products, and create external testing supplier plans.
• Develop advanced prototype components to identify highly complex problems in a range of features.
• Create a single project implementation schedule, determine resources needed for hardware engineering of complex features or products, identify significant project risks, and communicate progress to internal and external teams.
• Develop and review training materials, coordinate training, write device specification sheets, and interpret complex details required to design various hardware features.

Qualifications

Required Qualifications:

• Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
• OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
• OR equivalent experience

Ability to meet Microsoft, customer, and/or government security screening requirements, including a Microsoft Cloud Background Check.

Preferred Qualifications:

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
• OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
• OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
• OR equivalent experience
• 4+ years of experience in UVM (Universal Verification Methodology)/System Verilog
• Experience with Git for revision control
• Experience with scripting languages such as Python, Perl, Shell, or other related technologies
• Knowledgeable in IP, Subsystem, and/or full chip verification workflows or ASIC/FPGAs

Pay

The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay