Senior Verification Engineer

About the role

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally. The AISiE team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.

Responsibilities

• Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features.
• Lead a pre-silicon verification team for the development of custom Intellectual Property (IP) and Subsystem (SS) components with focus on architectural and micro-architectural based functions and features.
• Collaborate with the architecture and design teams to ensure the implementation meets both architectural and micro-architectural intent.
• Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness.
• Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments.
• Apply agile development methodologies including code reviews, sprint planning, and feature deployment.
• Provide technical leadership through mentorship and teamwork.

Required Qualifications

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
• Ability to meet Microsoft, customer and/or government security screening requirements, including Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
• This role will require access to information controlled for export under U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate must provide proof of citizenship or U.S. residency or other protected status for assessment of eligibility to access export-controlled information. Citizenship will be verified with a valid passport; lawful permanent residents, refugees, and asylees may verify status using other documents where applicable.

Preferred Qualifications

• 5+ years of related technical engineering experience OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 5+ years of industry experience in design verification delivering complex Application Specific Integrated Circuits (ASIC) or System on Chip (SOC).
• 7+ years of industry experience in design verification with a proven track record of delivering complex Central Processing Unit (CPU), Graphics Processing Unit (GPU) or System on Chip (SoC) IPs.
• Demonstrated experience in one or more of: interconnect fabrics, Network on Chip (NOCs), AXI-4 protocol based complex IP/blocks or subsystems.
• Experience with IP/SOC verification for a full product cycle from definition to silicon, including writing IP/block or subsystem level architecting DV environment, estimating efforts, test plans, developing tests, debugging failures and coverage signoff.
• Experience working on AI/Machine Learning (ML) SoCs.
• Knowledge of verification and debug principles, testbenches, Universal Verification Methodology (UVM) or C based test environments.
• Experience in post-silicon bring-up of complex SoCs involving complex NOC.
• Working knowledge of writing assertions, coverage and/or formal verification.
• Knowledge of industry standard bus interfaces such as Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) protocols.
• Background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments.
• Scripting languages such as Zsh, Bash, Python or Perl.

Pay

Typical base pay range across the U.S. is USD $119,800 - $234,700 per year. For the San Francisco Bay area and New York City metropolitan area, the base pay range is USD $160,200 - $261,000 per year. Certain roles may be eligible for benefits and other compensation.