Senior Verification Engineer

About the role

This position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.

• Drive a “zero-defect” mindset across the verification team
• Provide technical leadership and guidance on complex verification challenges
• Mentor and grow a small team of engineers

Responsibilities

• Define and execute verification plans
• Develop and implement verification testbenches
• Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
• Develop directed and constrained-random stimulus
• Analyze RTL, functional coverage, and assertion coverage results
• Define and develop functional coverage models
• Develop and maintain SystemVerilog assertions (SVA)
• Apply formal verification methodologies
• Demonstrate strong debugging skills, including failure reproduction and root-cause analysis
• Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus

Requirements

BSEE with 5+ years of semiconductor industry experience, or MSEE with 3+ years of experience, or PhD with 1+ years of experience.

Skills

• Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)
• Strong expertise in Verilog, SystemVerilog (VHDL is a plus)
• Experience with OVM/UVM and class-based verification methodologies
• Experience with formal verification methodologies
• Experience leveraging AI/LLM-based approaches to improve engineering efficiency
• Test pattern debugging and validation on simulation and automated test environments
• Scripting in Python, Perl, and UNIX/Linux
• Familiarity with functional and code coverage methodologies