Senior Staff Engineer, Design Verification

Your Team, Your Impact

The Custom Silicon Engineering team provides custom solutions for high-performance compute, server, network processing, and storage applications. CCS&A products employ state-of-the-art custom and industry standard technologies such as CXL, PCIE, Ethernet, and ARM CPU cores.

What You Can Expect

As a SoC-level design verification engineer, you will be responsible for the development and maintenance of UVM testbench components and other verification testing collaterals. You will be a member of a team charged with ensuring design quality in a variety of complex SoC architectures.

• Analyze architectures and designs to create comprehensive test plans and strategies.
• Contribute to the development of verification environments.
• Develop tests/testing strategies to achieve coverage goals.
• Debug failures and work with designers to resolve issues.

What We're Looking For

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and 4+ years of related professional experience. Or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3+ years of experience.
• Experience with Verilog and SystemVerilog, preferably with UVM.
• Basic proficiency with C/C++.
• Experience with scripting languages, e.g., Python or Perl.
• Working knowledge of the Linux operating system.

Pay

Expected Base Pay Range (USD) 151,000 - 223,440, $ per annum. The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.