DirectJobHub
Jobs · Information Technology · Massachusetts

Senior Engineer, Design Verification

Marvell Technology · Westborough, MA · 1 wk ago
Information TechnologyFull-time

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As part of the Design Verification Team at Marvell, you will verify complex semiconductor solutions across networking, compute, storage, and infrastructure domains. These designs enable high-speed, low-latency, and power-efficient data movement for data centers, telecom and enterprise networking, including both standard and customer-specific silicon. You will ensure designs meet stringent functional and performance requirements while contributing to next-generation AI and accelerated computing architectures. This includes supporting re-architecture efforts for AI-driven workloads, validating system-level performance, and helping identify and resolve architectural bottlenecks in scalable, high-bandwidth, and energy-efficient platforms.

What You Can Expect

  • Design, implement, and maintain UVM testbench components and other verification collateral to support comprehensive functional verification.
  • Analyze architectures and design specifications to develop comprehensive test plans and verification strategies.
  • Develop test cases and verification strategies, execute simulations, and analyze results to meet coverage goals.
  • Debug failures and collaborate with digital designers to resolve issues, ensuring product requirements are met, and fostering effective internal working relationships.
  • Provide mentorship and technical guidance to less experienced team members while helping drive execution of new projects and assignments.
  • Utilize and contribute to the development of automation tools to accelerate development cycles and leverage next-generation AI tools to enhance existing workflows.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field, with 1–3 years of relevant professional experience.
  • Or Master’s degree in Computer Science, Electrical Engineering, or a related field, with no prior professional experience required.
  • Experience with Verilog and SystemVerilog, with preferred familiarity in UVM-based verification methodologies.
  • Experience with constrained-random verification, functional coverage analysis, and assertion-based verification methodologies.
  • Strong foundation in digital logic design, finite state machines (FSMs), combinational and sequential circuit design, and computer architecture principles.
  • Familiarity with industry-standard protocols and technologies, including AMBA, PCIe, Ethernet, and memory coherency architectures.
  • Working knowledge of C/C++ programming languages.
  • Ability to create and maintain scripts using Python, Perl, or equivalent languages.
  • Familiarity with Linux environments and command-line tools.

Expected Base Pay Range (USD)

$108,500 - $160,510, per annum. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

  • Employee stock purchase plan with a 2-year look back.
  • Family support programs to help balance work and home life.
  • Robust mental health resources to prioritize emotional well-being.
  • A recognition and service awards to celebrate contributions and milestones.

Qualifications

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field, with 1–3 years of relevant professional experience.
  • Or Master’s degree in Computer Science, Electrical Engineering, or a related field, with no prior professional experience required.
  • Experience with Verilog and SystemVerilog, with preferred familiarity in UVM-based verification methodologies.
  • Experience with constrained-random verification, functional coverage analysis, and assertion-based verification methodologies.
  • Strong foundation in digital logic design, finite state machines (FSMs), combinational and sequential circuit design, and computer architecture principles.
  • Familiarity with industry-standard protocols and technologies, including AMBA, PCIe, Ethernet, and memory coherency architectures.
  • Working knowledge of C/C++ programming languages.
  • Ability to create and maintain scripts using Python, Perl, or equivalent languages.
  • Familiarity with Linux environments and command-line tools.

Equal Opportunity Employer

We are committed to providing equal employment opportunities for all applicants and employees. We do not discriminate on the basis of race, color, religion, sex, national origin, sexual orientation, gender identity, disability, age, genetic information, or any other characteristic protected by law.

Similar jobs