Jobs · OTHR · California

MTS, AI Optimized Memory Digital Design Engineer

Micron Technology · Folsom, CA · 3 wk ago
OTHR$175k–$309k/yrFull-time

About the role

Join Micron’s AI-Optimized Memory Architecture team, where we are shaping the future of artificial intelligence workloads through next-generation memory solutions. We partner closely with customers to architect and deliver high-performance memory systems that enable emerging AI platforms and applications. Our team values innovation, technical excellence, and collaboration as we bring advanced memory technologies from concept to silicon.

As a Member of Technical Staff, you will play a key role in translating architectural vision into efficient, silicon-proven hardware implementations. This position offers the opportunity to work on tightly coupled, high-performance memory architectures for AI, balancing performance, power, area, and reliability while influencing critical design decisions across the development lifecycle.

Responsibilities

  • Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon
  • Design, implement, and review SystemVerilog RTL for advanced memory system architectures
  • Perform synthesis and early PPA analysis to optimize area, power, and timing
  • Develop and maintain microarchitecture documentation that aligns design intent across teams
  • Evaluate architectural and implementation tradeoffs to support technical decision-making

Requirements

  • Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field
  • Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation
  • Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs
  • Experience with synthesis flows and early PPA estimation and optimization
  • Proficiency in SystemVerilog and at least one programming language such as C, C++, or Python

Preferred Qualifications

  • Master’s or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience
  • 5+ years of industry experience delivering silicon-proven memory systems or SoC hardware designs on modern process nodes
  • Familiarity with memory interfaces, reliability features, and media management concepts
  • Experience influencing architecture features with a strong understanding of RTL implementation cost and feasibility
  • Experience working with Agentic AI tools to assist with design and verification

Pay

The US base salary range for this full-time position is $175,000 - $309,000 a year. Additional compensation may include benefits, bonuses, and equity.

Salary ranges are determined by role, level, and location. The range displayed reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure, and relevant education or training.

Benefits

  • A choice of medical, dental, and vision plans enabling team members to select the plans that best meet their family healthcare needs and budget
  • Benefit programs that help protect income if unable to work due to illness or injury, and paid family leave
  • A robust paid time-off program and paid holidays

For additional information regarding the benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

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