Modem Hardware Design Verification Engineer – AI Driven Next Gen Modem Hardware Development, Staff
for section headings. Use - for any list of duties/requirements/benefits. Use
for prose.
We need to decide what is a list: responsibilities can be list items. Requirements (minimum qualifications) can be list. Preferred qualifications can be list. Skills maybe list. Benefits maybe list.
We need to avoid duplication.
Let's extract:
About the role: Could be the general summary paragraph: "Qualcomm is the world’s largest fabless semiconductor company... We are seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification organization, focused on AI‑driven verification methodologies and next‑generation modem hardware development. This role blends traditional DV expertise with cutting‑edge GenAI, ML‑assisted flows, and agentic-AI automation frameworks to accelerate coverage closure, improve debug efficiency, and enhance overall verification throughput. As a Wireless DV Engineer, you will define and execute verification plans, build reusable verification environments, and apply advanced verification techniques to validate complex wireless baseband and subsystem designs. You will collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products. We are open to candidates in Boxborough, MA."
That seems like role description. Could be About the role.
Responsibilities: maybe the bullet list of duties: define and execute verification plans, build reusable verification environments, apply advanced verification techniques to validate complex wireless baseband and subsystem designs, collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products.
But those are already in the summary. However we can still list them as responsibilities.
Requirements (minimum qualifications): Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree ... and 3+ years ... OR PhD ... and 2+ years ...
We need to keep that exactly.
Qualifications (preferred qualifications): BS or MS degree and 5+ years of relevant industry experience; Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving; Hands‑on constrained‑random verification using SystemVerilog with UVM/OVM, including functional/code/assertion coverage; Solid understanding of Verilog/VHDL, C/C++, SystemC, and scripting (Python/Perl); Experience with Generative AI, ML, or agentic-AI‑based verification automation, AI‑guided test generation, or ML‑based regression optimization; Background in wireless/wireline modem technology, DSP, or communication systems; Knowledge of 4G/5G 3GPP physical layer standards is a strong plus; Experience with simulation acceleration, formal verification, and HW/SW co‑verification; Strong OOP programming skills and/or RTL design exposure; Proficiency with Unix/Linux shell scripting, Perl, Makefiles, XML, and verification automation frameworks; Excellent communication, collaboration, and critical‑thinking skills.
Skills: Could be overlapping with preferred qualifications but we could extract specific skills: verification planning, testbench architecture, assertions, debugging, problem solving; constrained-random verification using SystemVerilog with UVM/OVM; functional/code/assertion coverage; Verilog/VHDL, C/C++, SystemC, scripting (Python/Perl); Generative AI, ML, agentic-AI verification automation; AI-guided test generation; ML-based regression optimization; wireless/wireline modem technology, DSP, communication systems; 4G/5G 3GPP physical layer standards; simulation acceleration, formal verification, HW/SW co-verification; OOP programming, RTL design exposure; Unix/Linux shell scripting, Perl, Makefiles, XML, verification automation frameworks; communication, collaboration, critical-thinking.
But we might just put the preferred qualifications under Qualifications and not duplicate under Skills. However we have both headings available; we could put Skills as a list of specific technical skills extracted.
But we must not invent or summarize away detail; we can list them as they appear.
Better: Use Qualifications for preferred qualifications (the bullet list). Use Requirements for minimum qualifications (the OR statements). Use Skills maybe for a subset like "Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving" etc. But that would duplicate content. The instruction: "Prefer a few substantive sections over many thin ones." So maybe we combine Requirements and Qualifications into one section? But we have headings for both; we could choose to include only those with real content. We have both minimum and preferred qualifications, so we can have two sections: Requirements (minimum) and Qualifications (preferred). That's two substantive sections.
Skills: Could be derived from preferred qualifications but might be considered thin if we just list same items. Better to omit Skills section if we already have Qualifications covering skills. However we have a heading for Skills; we could include it if we have specific skill list not already covered. But the preferred qualifications already list skills. To avoid duplication, we could omit Skills section.
Benefits: we have description: competitive annual discretionary bonus program, opportunity for annual RSU grants, highly competitive benefits package designed to support success at work, home, and play. Also link to US benefits. We can capture that.
Pay: Pay range $155,000 - $232,600. Also note salary is only one component; bonus, RSU. But we already put bonus and RSU under Benefits. So Pay section just the range.
Schedule: not present, omit.
About the role: we have the general summary paragraph.
Now we need to format.
We must not include any boilerplate like EEO, accommodation, agency warnings, etc. So we will strip those.
We need to ensure we preserve all substantive information: the company summary, location (Boxborough, MA), role description, responsibilities, minimum qualifications, preferred qualifications, pay, benefits.
Let's craft.
HTML:
About the role
Qualcomm is the world’s largest fabless semiconductor company and a global leader in wireless innovation—powering the majority of 3G, 4G, and 5G devices while pioneering the future 6G era. Our hardware engineering teams build industry‑leading modem and RF transceiver solutions enabling the next generation of wireless technology. We are seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification organization, focused on AI‑driven verification methodologies and next‑generation modem hardware development. This role blends traditional DV expertise with cutting‑edge GenAI, ML‑assisted flows, and agentic-AI automation frameworks to accelerate coverage closure, improve debug efficiency, and enhance overall verification throughput. As a Wireless DV Engineer, you will define and execute verification plans, build reusable verification environments, and apply advanced verification techniques to validate complex wireless baseband and subsystem designs. You will collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products. We are open to candidates in Boxborough, MA.
Responsibilities
- Define and execute verification plans
- Build reusable verification environments
- Apply advanced verification techniques to validate complex wireless baseband and subsystem designs
- Collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products
Requirements
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
- OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
- OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
Qualifications
- BS or MS degree and 5+ years of relevant industry experience
- Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving
- Hands‑on constrained‑random verification using SystemVerilog with UVM/OVM, including functional/code/assertion coverage
- Solid understanding of Verilog/VHDL, C/C++, SystemC, and scripting (Python/Perl)
- Experience with Generative AI, ML, or agentic-AI‑based verification automation, AI‑guided test generation, or ML‑based regression optimization
- Background in wireless/wireline modem technology, DSP, or communication systems
- Knowledge of 4G/5G 3GPP physical layer standards is a strong plus
- Experience with simulation acceleration, formal verification, and HW/SW co‑verification
- Strong OOP programming skills and/or RTL design exposure
- Proficiency with Unix/Linux shell scripting, Perl, Makefiles, XML, and verification automation frameworks
- Excellent communication, collaboration, and critical‑thinking skills
Pay
$155,000.00 - $232,600.00
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support success at work, home, and play
We must not include any extra text like "Pay Range And Other Compensation & Benefits". We already captured pay and benefits.
Check for any leftover boilerplate: we removed EEO,
for prose. We need to decide what is a list: responsibilities can be list items. Requirements (minimum qualifications) can be list. Preferred qualifications can be list. Skills maybe list. Benefits maybe list. We need to avoid duplication. Let's extract: About the role: Could be the general summary paragraph: "Qualcomm is the world’s largest fabless semiconductor company... We are seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification organization, focused on AI‑driven verification methodologies and next‑generation modem hardware development. This role blends traditional DV expertise with cutting‑edge GenAI, ML‑assisted flows, and agentic-AI automation frameworks to accelerate coverage closure, improve debug efficiency, and enhance overall verification throughput. As a Wireless DV Engineer, you will define and execute verification plans, build reusable verification environments, and apply advanced verification techniques to validate complex wireless baseband and subsystem designs. You will collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products. We are open to candidates in Boxborough, MA." That seems like role description. Could be About the role. Responsibilities: maybe the bullet list of duties: define and execute verification plans, build reusable verification environments, apply advanced verification techniques to validate complex wireless baseband and subsystem designs, collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products. But those are already in the summary. However we can still list them as responsibilities. Requirements (minimum qualifications): Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree ... and 3+ years ... OR PhD ... and 2+ years ... We need to keep that exactly. Qualifications (preferred qualifications): BS or MS degree and 5+ years of relevant industry experience; Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving; Hands‑on constrained‑random verification using SystemVerilog with UVM/OVM, including functional/code/assertion coverage; Solid understanding of Verilog/VHDL, C/C++, SystemC, and scripting (Python/Perl); Experience with Generative AI, ML, or agentic-AI‑based verification automation, AI‑guided test generation, or ML‑based regression optimization; Background in wireless/wireline modem technology, DSP, or communication systems; Knowledge of 4G/5G 3GPP physical layer standards is a strong plus; Experience with simulation acceleration, formal verification, and HW/SW co‑verification; Strong OOP programming skills and/or RTL design exposure; Proficiency with Unix/Linux shell scripting, Perl, Makefiles, XML, and verification automation frameworks; Excellent communication, collaboration, and critical‑thinking skills. Skills: Could be overlapping with preferred qualifications but we could extract specific skills: verification planning, testbench architecture, assertions, debugging, problem solving; constrained-random verification using SystemVerilog with UVM/OVM; functional/code/assertion coverage; Verilog/VHDL, C/C++, SystemC, scripting (Python/Perl); Generative AI, ML, agentic-AI verification automation; AI-guided test generation; ML-based regression optimization; wireless/wireline modem technology, DSP, communication systems; 4G/5G 3GPP physical layer standards; simulation acceleration, formal verification, HW/SW co-verification; OOP programming, RTL design exposure; Unix/Linux shell scripting, Perl, Makefiles, XML, verification automation frameworks; communication, collaboration, critical-thinking. But we might just put the preferred qualifications under Qualifications and not duplicate under Skills. However we have both headings available; we could put Skills as a list of specific technical skills extracted. But we must not invent or summarize away detail; we can list them as they appear. Better: Use Qualifications for preferred qualifications (the bullet list). Use Requirements for minimum qualifications (the OR statements). Use Skills maybe for a subset like "Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving" etc. But that would duplicate content. The instruction: "Prefer a few substantive sections over many thin ones." So maybe we combine Requirements and Qualifications into one section? But we have headings for both; we could choose to include only those with real content. We have both minimum and preferred qualifications, so we can have two sections: Requirements (minimum) and Qualifications (preferred). That's two substantive sections. Skills: Could be derived from preferred qualifications but might be considered thin if we just list same items. Better to omit Skills section if we already have Qualifications covering skills. However we have a heading for Skills; we could include it if we have specific skill list not already covered. But the preferred qualifications already list skills. To avoid duplication, we could omit Skills section. Benefits: we have description: competitive annual discretionary bonus program, opportunity for annual RSU grants, highly competitive benefits package designed to support success at work, home, and play. Also link to US benefits. We can capture that. Pay: Pay range $155,000 - $232,600. Also note salary is only one component; bonus, RSU. But we already put bonus and RSU under Benefits. So Pay section just the range. Schedule: not present, omit. About the role: we have the general summary paragraph. Now we need to format. We must not include any boilerplate like EEO, accommodation, agency warnings, etc. So we will strip those. We need to ensure we preserve all substantive information: the company summary, location (Boxborough, MA), role description, responsibilities, minimum qualifications, preferred qualifications, pay, benefits. Let's craft. HTML:
About the role
Qualcomm is the world’s largest fabless semiconductor company and a global leader in wireless innovation—powering the majority of 3G, 4G, and 5G devices while pioneering the future 6G era. Our hardware engineering teams build industry‑leading modem and RF transceiver solutions enabling the next generation of wireless technology. We are seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification organization, focused on AI‑driven verification methodologies and next‑generation modem hardware development. This role blends traditional DV expertise with cutting‑edge GenAI, ML‑assisted flows, and agentic-AI automation frameworks to accelerate coverage closure, improve debug efficiency, and enhance overall verification throughput. As a Wireless DV Engineer, you will define and execute verification plans, build reusable verification environments, and apply advanced verification techniques to validate complex wireless baseband and subsystem designs. You will collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products. We are open to candidates in Boxborough, MA.
Responsibilities
- Define and execute verification plans
- Build reusable verification environments
- Apply advanced verification techniques to validate complex wireless baseband and subsystem designs
- Collaborate closely with system, firmware, and RTL design teams to ensure first‑time‑right silicon for high‑performance modem products
Requirements
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
- OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
- OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience
Qualifications
- BS or MS degree and 5+ years of relevant industry experience
- Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving
- Hands‑on constrained‑random verification using SystemVerilog with UVM/OVM, including functional/code/assertion coverage
- Solid understanding of Verilog/VHDL, C/C++, SystemC, and scripting (Python/Perl)
- Experience with Generative AI, ML, or agentic-AI‑based verification automation, AI‑guided test generation, or ML‑based regression optimization
- Background in wireless/wireline modem technology, DSP, or communication systems
- Knowledge of 4G/5G 3GPP physical layer standards is a strong plus
- Experience with simulation acceleration, formal verification, and HW/SW co‑verification
- Strong OOP programming skills and/or RTL design exposure
- Proficiency with Unix/Linux shell scripting, Perl, Makefiles, XML, and verification automation frameworks
- Excellent communication, collaboration, and critical‑thinking skills
Pay
$155,000.00 - $232,600.00
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support success at work, home, and play