Memory Circuit Design Engineer

Responsibilities

• Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
• Memory bit-cell and complex periphery IC layout and automation.
• Memory array/IP design, memory circuit innovation, test-chip design.
• Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.

Qualifications

• Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, with 4+ years of professional experience.
• Or a PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, with 1-2 years of professional experience.
• Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM.
• Design trade-offs between power, performance, and area (PPA).
• Custom digital circuit design, simulation, layout design, and verification.
• Knowledge of EDA tools used for custom digital and memory circuit design.
• Design technology co-optimization (DTCO).
• Post-Si validation experience.
• Knowledge of the CMOS ASIC design flow.

Benefits

Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Position of Trust: N/A

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.