CPU Circuit Memory Design Engineer

About the role

Intel's CPU Circuit Technology team is seeking a highly motivated CPU Memory Design Engineer to help develop the next generation of high-performance, power-efficient processors. In this role, you will contribute to the design, development, and optimization of custom and compiler-based embedded memory solutions, including SRAMs, caches, register files, ROMs, and advanced memory circuits used in Intel CPUs and SoCs. You will collaborate closely with architects, circuit designers, physical design engineers, process technologists, and validation teams to drive innovative memory solutions that enable industry-leading performance, power efficiency, and silicon density on advanced process technologies.

Responsibilities

• Technical readiness, memory circuit design, characterization and simulations.
• Cache design, critical path simulations and design custom blocks to meet stringent Power/Performance/Area constraints.
• Memory path-finding activities and power, performance and area (PPA) optimization.
• Memory bit-cell and complex periphery IC design and automation.
• Memory array/IP design, memory circuit innovation.
• Methodology definition tasks as well as executing project schedules.

Behavioral Traits

• Strong Ownership: Takes accountability for complex technical challenges and drives solutions through completion.
• Technical Curiosity: Continuously seeks to learn, innovate, and improve designs through data-driven decision making.
• Collaboration: Builds effective partnerships across architecture, design, layout, and validation teams.
• Problem Solving: Applies analytical thinking to identify root causes and develop scalable solutions.
• Execution Excellence: Delivers high-quality work while balancing technical depth, schedule commitments, and business priorities.
• Communication Skills: Effectively communicates technical concepts, risks, and recommendations to diverse stakeholders.
• Adaptability: Thrives in a fast-paced environment with evolving priorities and technology challenges.

Minimum Qualifications

A Bachelor's degree in Electrical/Computer Engineering, or a STEM-related field with 4+ years of experience. Or a Master's degree in the same field with 2+ years of experience; or a PhD with 1 year of educational or work experience in the same field.

Your experience described above must be in the following:

• CMOS circuit design, digital logic optimizations, and circuit trade-offs for power, performance, and area.
• Experience in Very Large Scale Integration (VLSI) circuits and design methodologies.

Preferred Qualifications

• Experience in low-power implementation techniques and memory design.
• Familiarity with circuit and layout trade-offs for optimized design.
• Knowledge of EBB design tools, flows and methodologies, and signal integrity analysis.