Memory Circuit Design Engineer

Responsibilities

• Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
• Memory bit-cell and complex periphery IC layout and automation.
• Memory array/IP design, memory circuit innovation, test-chip design.
• Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.

Qualifications

• Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, including 4+ years of professional experience gained through either internships or full-time employment.
• Or a PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline.
• Technical Experience:
  • Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM.
  • Design trade-offs between power, performance, and area (PPA).
  • Custom digital circuit design, simulation, layout design, and verification.
  • Knowledge of EDA tools used for custom digital and memory circuit design.

Preferred Qualifications

• PhD with 1-2 years of professional experience gained through either internships or full-time employment.
• Design technology co-optimization (DTCO).
• Post-Si validation experience.
• Knowledge of the CMOS ASIC design flow.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Pay

Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 232,190.00 USD

Schedule

Shift 1 (United States of America)

Location

Primary Location: US, Oregon, Hillsboro

Additional Locations

• US, Arizona, Phoenix
• US, California, Santa Clara
• US, Texas, Austin