IC Design Engineer

About the role

The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.

Responsibilities

• Layout design of digital high-performance blocks
• Timing closure of the blocks with best PPA (power/performance/area)
• Debug LVS/DRC/ERC errors with verification tool
• Analyze the trade-offs and performance implications of different cell architectures
• Collaborate with design and layout engineers to optimize layout for area and performance
• Work with CAD, packaging and foundry teams in resolving layout and/or verification issues

Requirements

• Strong understanding of physical implementation
• Experience working with advanced semiconductor technologies
• Experience in implementing low power and high-performance cores
• Excellent communication and cross-functional collaboration skills
• Ability to analyze complex trade-offs and make data-driven decisions
• 5-10 years of hands-on experience with Place and Route tools
• Bachelor’s and 5+ years of related experience; Master’s or PhD in Engineering is a plus

Pay

The annual base salary range for this position is USD 101,000 to USD 162,000.

Benefits

• Discretionary annual bonus
• New hire equity grant and annual equity awards
• Medical, dental, and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays, paid sick leave, and vacation time
• Paid Family Leave and other leaves of absence as applicable by law