Director, ATE Test Engineering

About The Role

Ampere is seeking a hands-on, high-impact leader to build and scale our ATE Test Engineering organization from NPI through high-volume manufacturing (HVM) of our next-generation power-efficient server products. You will define and execute test strategy, architectures, and operating processes that deliver world-class test coverage, quality, yield, and total cost of test; enabling fast, reliable ramp across multiple product lines.

What you’ll achieve

• Build and scale the organization: Recruit, mentor, and develop a high-performing ATE test engineering team; establish clear technical standards, ways of working, and measurable goals.
• Own end-to-end ATE test strategy: Define ATE test architecture, methodologies, and coverage targets from pre-silicon through HVM, ensuring alignment to product quality and yield requirements.
• Partner cross-functionally: Work closely with Design/DFT, Product/Package, Manufacturing, and Quality to establish testability requirements, DFX-to-test transfer plans, and release criteria.
• Drive NPI execution and production readiness: Ensure robust test bring-up, validation, and production release—meeting targets for cost, schedule, quality, and yield.
• Architect scalable ATE test solutions: Lead the design of flexible, reusable test program structures that enable rapid ramp-up across sites and product variants.
• Oversee high-speed ATE development: Provide technical leadership on high-speed ATE test hardware and interface development for HPC server products (e.g., load-board/probing strategy, instrumentation, timing/accuracy requirements).
• Lead test planning governance: Run and drive alignment in test plan reviews and technical decision forums across engineering, product, and operations.
• Data-driven yield and quality improvement: Analyze yield, scrap, and retest data to identify bottlenecks; drive continuous improvement with product/process teams.
• Lead quality investigations: Own and drive systematic problem solving (e.g., 8D, RCCA) to eliminate root causes and prevent test escapes across products and manufacturing sites.
• Manage external partners and sites: Partner with OSATs/CMs/test houses to ensure process control, rapid excursion response, and strong operational KPIs (e.g., DPPM, yield, escapes, retest rates, throughput).
• Own ATE CAPEX and vendor strategy: Lead budgeting, equipment selection, and sustaining strategies for load boards, probe cards, sockets, instrumentation, and related test infrastructure.
• Establish engineering workflows and rigor: Implement robust software and process practices including version control, code review, CI/CD for test software, change control, golden units, and full traceability.
• Ensure compliance and IP protection: Ensure adherence to applicable standards and robust secure workflows (e.g., ISO 9001; add IATF 16949 / AEC-Q100 and ISO 13485 if applicable). Protect IP through secure test flows and controlled access.

About you

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field plus 15 years of relevant experience; or Master’s degree plus 12 years of relevant experience in semiconductor test engineering, product engineering, or test development.
• 5+ years of leadership experience managing Test and/or Product engineering teams
• Strong expertise in ATE hardware design, test methodology, failure analysis/silicon debug, and test software development (e.g., C/C++, Python)
• Deep knowledge of: Scan/ATPG Memory BIST High-speed I/O testing Silicon debug and correlation between test and design behavior
• Proven experience with high-end ATE platforms such as: Advantest EXA Scale and/or Teradyne UltrFLEX+
• Demonstrated ability to drive alignment across design, product, and operations through influence and data-driven decision-making
• Proven track record managing NPI and scaling into HVM, including global OSAT bring-up and ramp support
• Experience with OSAT/CM operations in Asia, including process control and remote debug; willingness to travel