Digital Design Verification, Principal Engineer / Architect-17853

About the role

The hiring manager is open to hiring in Sunnyvale and Hillsboro also apart from the primary preference of, Austin, TX.

Responsibilities

• Applying AI techniques to accelerate design verification – leveraging internal and/or external agentic AI tools to generate verification plan, testcases, coverage and debug collaterals
• Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Building robust, scalable verification infrastructures from the ground up to support diverse and complex IP and SoC projects.
• Partnering with global engineering teams to define, document, and propagate best-in-class verification methodologies and standards.
• Leading and mentoring junior engineers, fostering a culture of technical growth, innovation, and collaboration within the team.
• Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables.
• Collaborating closely with tool development teams to influence product evolution and optimize verification workflows for maximum efficiency.
• Supporting customers and internal stakeholders by troubleshooting, optimizing, and refining verification processes and flows.

Requirements

• Minimum 12+ years of hands-on experience in IP/SoC verification, with a proven track record of hands-on technical contributions.
• Good understanding of Agentic AI technologies specifically Cursor and/or VS Code co-pilot.
• Passion to learn Agentic AI mechanisms and apply them for design verification.
• Familiarity with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Demonstrated ability to validate verification flows and infrastructure for complex digital designs.
• Exposure to Agentic AI EDA tools will be a big plus.
• Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages).
• Bachelor’s or Master’s degree in electrical/Electronics/Computer engineering
• Experience with multi-tasking and managing technical projects independently.
• Solid communication and documentation skills, able to communicate technical methodologies across global teams.

Qualifications

• Self-motivated leader who takes initiative and drives projects to successful completion.
• Innovative problem solver who thrives in dynamic, fast-paced environments.
• Excellent communicator, able to distill complex technical topics for diverse audiences.
• Natural mentor and team player, passionate about knowledge-sharing and team development.
• Strategic thinker with a keen eye for detail and a commitment to quality.
• Adaptable, resilient, and eager to learn and grow alongside industry leaders.

Skills

• Strong proficiency in SystemVerilog, UVM, Tcl, Python or similar languages.
• Experience with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Knowledge of Agentic AI technologies specifically Cursor and/or VS Code co-pilot.
• Experience with multi-tasking and managing technical projects independently.
• Excellent communication and documentation skills.

Benefits

• Comprehensive medical and healthcare plans.
• ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
• Retirement plans that vary by region and country.
• Competitive salaries.