ASIC DFT Technical Leader
for section headings like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. Use only when posting has real specific content.
We have "Meet the Team" could be "About the role"? Not exactly. Could treat as "About the team". But headings list includes "About the role". We could use that heading for the team description. Or we could not use heading if not matching? The instruction: use for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). It says use those as examples, not limited to those? Probably we should use those headings when appropriate. We have content about team, impact, qualifications, why Cisco, pay, benefits, schedule (time off). So we can map:
- About the role: could combine "Meet the Team" and "Your Impact"? Might be better to have separate sections: About the role (team description), Responsibilities (Your Impact), Requirements (Minimum Qualifications), Qualifications (Preferred Qualifications), Benefits, Pay, Schedule.
We must not create sections with filler. Ensure we have real content.
Let's extract:
Meet the Team paragraph: "The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world."
Your Impact paragraph: "You will be in the Silicon One development organization as an ASIC Technical Lead in San Jose with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities."
Minimum Qualifications list: bullet points? It's a paragraph with multiple items separated by periods. We need to convert to - . Items:
- Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12+ years of experience.
- Prior experience in post-silicon debug experience from first silicon to production
- Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Prior experience working with Gate level simulation, debugging with VCS and other simulators.
Preferred Qualifications list: items:
- Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
- DFT CAD development - Test Architecture, Methodology and Infrastructure
- Test Static Timing Analysis
- Post silicon validation using DFT patterns.
- Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Why Cisco? paragraph: long description.
Pay: salary range: $214,100.00 to $309,800.00 (starting salary range posted for this position) plus location-specific ranges: New York City Metro Area $214,100.00 - $356,300.00; Non-Metro New York State & Washington State $192,400.00 - $317,200.00. Also note that for quota-based sales roles ranges include base pay and sales target incentive compensation combined. But this is not a sales role? It's ASIC Technical Lead, so likely not sales. We'll just include the salary info as given.
Benefits: paragraph about U.S. employees benefits: medical, dental, vision insurance, 401(k) with match, paid parental leave, short/long-term disability, basic life insurance, plus mention of Cisco restricted stock units, paid time away details.
Schedule: time off details: 10 paid holidays, 1 floating holiday, birthday day off, paid year-end holiday shutdown, 4 paid days off for personal wellness, vacation details (non-exempt 16 days, exempt flexible), sick time 80 hours per year, etc. Also volunteer days.
We need to output only HTML fragment, no markdown fences.
We'll structure:
About the role
Meet the Team paragraph + maybe combine with Your Impact? Actually we have separate Impact. Could put Impact under Responsibilities.
Thus:
About the role
[Meet the Team paragraph]
Responsibilities
[Your Impact paragraph]
Requirements
- ...
...
Qualifications
- ...
...
Benefits
[Benefits paragraph]
Pay
[Salary info paragraph]
Schedule
[Time off details paragraph]
We need to ensure we don't include boilerplate like EEO, application instructions, cookie/navigation, etc. The posting includes "Message to applicants applying to work in the U.S. and/or Canada:" which is part of pay/benefits; we can keep that as part of Pay section? It's about salary range. We'll include that.
We must not repeat job title. Not include Job ID.
Let's craft paragraphs exactly as in text, preserving all info.
We need to be careful to not include duplicated lines. The posting includes some duplicated lines? Not obvious.
We'll produce HTML.
Let's write:
About the role
The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Responsibilities
You will be in the Silicon One development organization as an ASIC Technical Lead in San Jose with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.
Requirements
- Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12+ years of experience.
- Prior experience in post-silicon debug experience from first silicon to production
- Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Prior experience working with Gate level simulation, debugging with VCS and other simulators.
Qualifications
- Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
- DFT CAD development - Test Architecture, Methodology and Infrastructure
- Test Static Timing Analysis
- Post silicon validation using DFT patterns.
- Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Benefits
U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees, 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco. Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees. Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations). 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next. Additional paid time away may be requested to deal with critical or emergency issues for family members. Optional 10 paid days per full calendar year to volunteer. For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies. Employees On Sales Plans Earn Performance-based Incentive Pay On Top Of Their Base Salary, Which Is Split Between Quota And Non-quota Components, Subject To The Applicable Cisco Plan. For Quota-based Incentive Pay, Cisco Typically Pays As Follows .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area $214,100.00 - $356,300.00 Non-Metro New York State & Washington State $192,400.00 - $317,200.00 For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
Wait, that paragraph includes both benefits and pay and schedule all mixed. We need to separate Benefits, Pay, Schedule.
- . Items:
- Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12+ years of experience.
- Prior experience in post-silicon debug experience from first silicon to production
- Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Prior experience working with Gate level simulation, debugging with VCS and other simulators.
Preferred Qualifications list: items:
- Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
- DFT CAD development - Test Architecture, Methodology and Infrastructure
- Test Static Timing Analysis
- Post silicon validation using DFT patterns.
- Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Why Cisco? paragraph: long description.
Pay: salary range: $214,100.00 to $309,800.00 (starting salary range posted for this position) plus location-specific ranges: New York City Metro Area $214,100.00 - $356,300.00; Non-Metro New York State & Washington State $192,400.00 - $317,200.00. Also note that for quota-based sales roles ranges include base pay and sales target incentive compensation combined. But this is not a sales role? It's ASIC Technical Lead, so likely not sales. We'll just include the salary info as given.
Benefits: paragraph about U.S. employees benefits: medical, dental, vision insurance, 401(k) with match, paid parental leave, short/long-term disability, basic life insurance, plus mention of Cisco restricted stock units, paid time away details.
Schedule: time off details: 10 paid holidays, 1 floating holiday, birthday day off, paid year-end holiday shutdown, 4 paid days off for personal wellness, vacation details (non-exempt 16 days, exempt flexible), sick time 80 hours per year, etc. Also volunteer days.
We need to output only HTML fragment, no markdown fences.
We'll structure:
About the role
Meet the Team paragraph + maybe combine with Your Impact? Actually we have separate Impact. Could put Impact under Responsibilities. Thus:
About the role
[Meet the Team paragraph]
Responsibilities
[Your Impact paragraph]
Requirements
- ... ...
Qualifications
- ... ...
Benefits
[Benefits paragraph]
Pay
[Salary info paragraph]
Schedule
[Time off details paragraph]
We need to ensure we don't include boilerplate like EEO, application instructions, cookie/navigation, etc. The posting includes "Message to applicants applying to work in the U.S. and/or Canada:" which is part of pay/benefits; we can keep that as part of Pay section? It's about salary range. We'll include that. We must not repeat job title. Not include Job ID. Let's craft paragraphs exactly as in text, preserving all info. We need to be careful to not include duplicated lines. The posting includes some duplicated lines? Not obvious. We'll produce HTML. Let's write:About the role
The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Responsibilities
You will be in the Silicon One development organization as an ASIC Technical Lead in San Jose with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.
Requirements
- Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12+ years of experience.
- Prior experience in post-silicon debug experience from first silicon to production
- Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
- Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
- Prior experience working with Gate level simulation, debugging with VCS and other simulators.
Qualifications
- Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
- DFT CAD development - Test Architecture, Methodology and Infrastructure
- Test Static Timing Analysis
- Post silicon validation using DFT patterns.
- Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
Benefits
U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees, 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco. Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees. Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations). 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next. Additional paid time away may be requested to deal with critical or emergency issues for family members. Optional 10 paid days per full calendar year to volunteer. For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies. Employees On Sales Plans Earn Performance-based Incentive Pay On Top Of Their Base Salary, Which Is Split Between Quota And Non-quota Components, Subject To The Applicable Cisco Plan. For Quota-based Incentive Pay, Cisco Typically Pays As Follows .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area $214,100.00 - $356,300.00 Non-Metro New York State & Washington State $192,400.00 - $317,200.00 For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
Wait, that paragraph includes both benefits and pay and schedule all mixed. We need to separate Benefits, Pay, Schedule.