Technologist, Systems Design Engineering
About the role
Drive the development and productization of next-generation NAND Interface Mux/Buffer technologies that enable high-performance, reliable, enterprise-class storage solutions. Support both internal enterprise SSD programs and component business customers.
Responsibilities
Leading the architecture, design, and productization of NAND IF Mux/Buffer solutions from concept through production.
Creating and maintaining high-quality design and architecture documentation to support scalable and robust implementations.
Performing RTL simulation, debug, and analysis, and driving resolution of complex functional and performance issues.
Owning end-to-end problem solving and root-cause analysis across RTL, firmware (FW), silicon, and system integration.
Driving FW bring-up and FW-assisted debug, including HW-FW interaction, handshakes, and system flows.
Supporting post-silicon bring-up and lab debug, working across silicon, FW, validation, and system teams.
Collaborating closely with design partners to define and implement optimal architectural and implementation solutions.
Working directly with component business units and customers to debug issues, ensure smooth integration, and enable successful deployment of SanDisk solutions.
Leveraging automation, scripting, and AI-assisted tools to improve debug efficiency, analysis quality, and overall engineering productivity.
Acting as a technical leader, influencing architecture and design decisions across teams without direct authority.
Qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
Strong experience in digital and system-level architecture and design, preferably with NAND interfaces, Mux/Buffer designs, or related ASIC/IP blocks.
Proven expertise in RTL development, simulation, and debug (Verilog / SystemVerilog), including waveform-based analysis.
Demonstrated ability to drive systematic problem solving and root-cause analysis across RTL, FW, silicon, and system boundaries.
Hands-on experience with firmware (FW) bring-up and debug, including: HW-FW interaction and control flows, FW-driven sequences and failure analysis.
Experience with post-silicon bring-up and lab debug, including cross-functional debug with validation and FW teams.
Proficiency in Python and scripting (e.g., Python, Bash, Tcl) for automation, data analysis, debug flows, and productivity improvement.
Experience utilizing AI-assisted engineering tools to accelerate debug, analysis, automation, and documentation, with sound engineering judgment.
Strong understanding of HW-FW-system interactions, with the ability to debug complex issues spanning multiple layers.
Ability to collaborate effectively with design partners, internal cross-functional teams, and external customers.
Demonstrated ability to lead technical direction and influence decisions without formal people management responsibility.
Strong written and verbal communication skills, including the ability to produce clear, concise technical documentation and customer-facing explanations.