Staff Verification Design Engineer, DRAM

We are seeking an experienced Verification Engineer to develop and implement verification strategies for advanced DRAM products. You will collaborate with cross-functional teams to ensure memory circuits meet performance, quality, and reliability standards. Key Responsibilities Include Designing and driving verification of memory circuits from gate‑level to full chip implementationsDeveloping verification plans and leading circuit‑ and system‑level verification using industry-standard toolsVerifying memory arrays, control logic, address decode, data paths, and internal test logicAnalyzing layout‑extracted parasitics and participating in critical circuit reviews Qualifications Bachelor’s in Electrical or Computer Engineering5+ years in verification or related rolesStrong background in semiconductor circuit design, modeling, and verificationKnowledge of DRAM/memory architecture and verification challengesProficiency with HSPICE and Python Preferred Skills Include Experience with DFT methodologies, RTL verification, STA, or timing-accurate VerilogSilicon validation, test chip bring-up, or post-silicon debug experienceMentoring engineers and influencing verification strategies globallyExtensive circuit-level verification using analog, SPICE, and Verilog tools