Staff Design Engineer, DRAM

Role: As a Staff Design Engineer on the DRAM team, you will lead the design, layout, and optimization of Memory, Logic, and Analog circuits for next-generation memory products. Responsibilities Design and optimize circuits, handle parasitic modeling, and support validation, reticle experiments, and tape-out revisions.Oversee layout processes including floor-planning, placement, and routing.Conduct verification through modeling and simulation using industry-standard tools.Collaborate with cross-functional teams such as Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering to ensure manufacturability.Utilize Generative AI tools to accelerate design, analysis, and documentation, ensuring correctness and signoff. Qualifications Bachelor’s degree in Electrical or Computer Engineering, with 5+ years of CMOS and VLSI circuit design experience.Hands-on experience in mixed-signal schematic design, layout, and circuit simulation.Knowledge of power distribution, parasitic modeling, and tape-out flows.Preferred: Master’s or PhD, DRAM/memory circuit design expertise, familiarity with PEX and PVT analysis, and experience with AI tools for design and debugging. Skills: Strong circuit design, layout, simulation, collaboration, and problem-solving abilities, with an emphasis on manufacturability and innovation in memory technology.