Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer
About the role
We are seeking an experienced and technically exceptional Staff Engineer for a role as Digital ASIC Chip Architect and Signal Processing System Engineer to join a high-performing team focused on the architecture and development of cutting-edge, mixed-signal and software-defined radio (SDR) signal chains. This role is ideal for a hands-on technical contributor with a deep background in digital signal processing and digital design, and a passion for shaping definition, requirements and solutions in a collaborative team.
Key Responsibilities
Architectural Leadership: Drive the definition and architecture of complex mixed-signal ICs and SDR chips, with a focus on digital accelerators and subsystems.
Cross-Functional Collaboration: Work closely with analog, RF, firmware, and software teams to ensure cohesive SoC and system-level design.
Requirements Management: Capture and maintain stakeholder requirements and ensure the development teams remain aligned throughout the program.
Project Execution: Support the successful execution of IC development programs from concept through tape-out and validation.
Mentorship and Culture: Foster a culture of technical excellence and continuous learning. Support the development of team members through mentoring and engagement.
Innovation and Strategy: Stay ahead of industry trends and emerging technologies to guide architectural decisions and maintain competitive advantage.
External Engagement: Work with Customers, Ecosystem Partners, and ADI stakeholders to define future SDR technologies.
Required Qualifications
10+ years of experience, including 5 years of digital IC design.
Expertise in digital signal processing, RTL design, and digital architecture.
Strong knowledge of:
- Firmware and embedded software
- Radio architecture and signal chains
- Microprocessor subsystems and digital accelerators
- DSP cores and custom compute architecture
- Hardware/Software Co-Design and Digital Modelling
Preferred Qualifications
Experience with system-level modeling and simulation (e.g., MATLAB, SystemVerilog, Python).
Signal Processing for Radio Signal Chains
Working understanding of signal processing for High-speed ADCs/DACs
SerDes and high-speed interfaces
Demonstrated ability of requirements capture and documentation.
Familiarity with SoC integration and verification methodologies.
Exposure to productization and manufacturing ICs in high-volume.
Strong written and verbal communication skills.