Sr Principal ASIC Design Engineer - Terawave
Ladders · San Francisco, CA · 5 days ago
On-siteEngineering$308k–$431k/yrFull-time
Responsibilities
- Drive end-to-end design and verification methodologies
- Write requirements, specifications, and test plans
- Optimize design performance while minimizing power consumption
- Perform complex subsystem and SoC verifications
- Integrate external IP and manage ARM CPU integration
Qualifications
- BS/MS in Electrical Engineering or related field
- 15+ years of experience in ASIC/SOC design and verification
- Deep expertise in innovative verification flows
- Strong knowledge of Verilog/System Verilog and DSP structures
- Experience in post-silicon bring-up and FPGA flow
Benefits
- Medical, dental, vision insurance
- Paid parental leave and short/long-term disability support
- 401(k) with 5% company match
Education
- Support Program for further training
- Up to four weeks of paid time off and 14 paid holidays
- Stock options for regular employees