Sr Manager Design Development Technical Leadership, HBM

Responsibilities

• Own end-to-end execution of on schedule delivery of HBM design achievements, ensuring alignment across DRAM, base die, test chips, PTVs, interposers, and sustaining designs.
• Be the primary design representative in PDT and executive reviews.
• Define and manage cross-functional dependencies across all collaborators.
• Lead execution governance, including DDTL Syncs and Design Program Reviews (DPRs), providing clear executive-level status, risks, and decision asks.
• Own and operate formal Change Control Board (CCB) processes, ensuring disciplined POR management, cost/schedule awareness, and traceability.
• Maintain a comprehensive design risk register. Proactively identify risks, lead mitigation workgroups, define checkpoints, and bring up issues through governance forums as required.
• Capture and institutionalize lessons learned to improve future program execution.
• Drive early engagement during architecture and design phases to enable shift-left risk mitigation.
• Lead initiatives to optimize die size, DFM, yield, cost, power, and manufacturing efficiency.
• Ensure HBM products meet best-in-class targets for performance, power, quality, reliability, and cost.
• Lead design-phase engagement with external foundries and IP providers, identifying and resolving execution dependencies.
• Own IP forecasting, selection, and prioritization, aligning technical needs with budget and roadmap constraints.
• Lead design contractor, IP vendor, and procurement engagements supporting design execution.
• Own design-phase financial accountability for the HBM portfolio.
• Develop IP cost projections, track actuals, manage approvals, and drive prioritization in alignment with design and business objectives.
• Manage mask cost planning and execution for test vehicles, test chips, and live die across TSMC and UMC nodes, ensuring cost transparency and schedule alignment.
• Serve as the program-level central owner of the HBM design roadmap.
• Maintain, integrate, and communicate roadmap updates across Design, PDT, and executive collaborators.
• Capture customer requirements and schedules for customized HBM products and ensure execution alignment.
• Partner with Business, Finance, and Product teams to align design execution with roadmap and market priorities.
• Provide concise, data-driven executive communications, advancing critical issues when necessary.

Qualifications

• Understanding of custom and digital design flows and the full SoC/DRAM development lifecycle.
• Demonstrated ability to lead large, cross-functional technical programs through influence and execution rigor.
• Experience working with foundries, IP vendors, and ecosystem partners.
• Knowledge of DRAM operation, preferably within the HBM product family.
• Familiarity with industry standards and compliance requirements (e.g., JEDEC).

Preferred Qualifications

• 10+ years of relevant industry experience.
• Bachelor’s degree in Electrical Engineering or a related field, with equivalent experience considered.
• Strong analytical, problem-solving, and decision-making skills.
• Experience with formal program or project management methodologies.
• Strong executive communication skills and ability to operate effectively in a fast-paced, dynamic environment.