Senior Principal Engineer, Design Verification

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you!

What You Can Expect

As a member of a dynamic ASIC development team, the candidate will be responsible for leading verification architecture, execution, delivery, post silicon validation, emulation of the next generation ASICs under development working closely with cross functional teams. The member will also have an opportunity to leverage the experience to drive the ASIC front end ASIC development process, emulation, PSV, tools and methodologies leading to the successful ASIC products.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience.
• Master’s degree in Computer Science, Electrical Engineering or related fields with 18+ years of experience.
• PhD in Computer Science, Electrical Engineering or related fields with 12+ years of experience.

Strong understanding of ASIC development process, tools and verification methodologies. Demonstrated track record of leading verification and delivery high quality ASICs. Hands-on experience in verification of multiple SoC architectures, processor cores, memory subsystems and peripheral interfaces. Hands-on experience of bringing up multiple ASICs in the lab. Hands-on experience in driving emulation efforts leading to successful tapeout

Proven ability of leading ASIC development teams. Excellent communication, interpersonal and presentation skills. Strong cross-functional leadership skills. Highly motivated, self-driven and ability to drive adoption of new methodologies.

Pay

Expected Base Pay Range (USD): 184,400 - 272,950, $ per annum

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.