Senior NPI Packaging Engineer

About the role

This position assists with all aspects of semiconductor packaging through all phases of product development which includes early concept feasibility, prototyping, product qualification, and product transition to production.

Responsibilities

• Design of bump, package, and assembly process flow for new products for use in high volume, high reliability, industrial, commercial, and automotive applications.
• Contributes to a forward-looking packaging roadmap and aligns with product line roadmaps and other technology roadmaps.
• Researches new packaging technologies and or suppliers to facilitate and propel product line roadmaps in a highly competitive market landscape.
• Develops manufacturing processes and documents process capabilities in the form of design rules for product development teams.
• Creates early concept sketches in support of technology recommendations, collects cost estimates in support of customer facing product opportunity pursuits.
• Affords cross functional design teams with making appropriate design decisions related to packaging and assembly processes for both prototype and high-volume manufacturing.
• Performs cost and risk assessments for new product designs against known design rules.
• Details package design including the use of tolerance analysis and simulation tools to assess design integrity and performance for mechanical and thermal reliability as well as manufacturing producibility.
• Prepares design documentation and bill of materials for both chip fabrication, backend wafer processes, and component assembly.
• Executes DoE experiments collecting characterization data to substantiate design decisions and mitigate technical risk to new products in development.
• Collaborates with internal support personnel and other key supply chain partners including wafer fabs, offshore assembly and test contractors, and 3rd party service providers with service needs for specific technology or product developments.
• Supports failure analysis and problem resolution in the development process or production environment.
• Mentor junior engineers in the packaging and assembly disciplines.

Requirements

• Bachelor of Engineering (Packaging, Electrical, Mechanical, Materials or Chemical), Physics or Chemistry.
• 5 years of experience in electronics packaging with Bachelors (3yrs with Masters, with PhD).
• Work experience must include hands-on experience in specific packaging technology discipline.
• Experience with package assembly process development.
• Understands material properties and interactions with manufacturing processes.
• Hands on experience with design tools such as AutoCAD and Cadence Allegro (or equivalent).
• Demonstrated experience driving packaging technology developments.
• Hands on experience with manufacturing equipment and processing.
• Experience working with 3rd party suppliers.
• Familiarity with DOE methodology.
• Ability to present highly technical information to non-technical personnel.
• Familiarity with Microelectronic packaging technologies such as flip chip bumping, wafer backend processing, SMT, flip chip attach, flux cleaning, overmold, package marking, dicing, test, and packaging for shipment.

Qualifications

• Bachelor’s in Engineering (Packaging, Electrical, Mechanical, Materials or Chemical), Physics or Chemistry; MS preferred.

Skills

• Hands on experience with design tools such as AutoCAD and Cadence Allegro (or equivalent).
• Experience with package assembly process development.
• Understanding of material properties and interactions with manufacturing processes.
• Experience working with 3rd party suppliers.
• Familiarity with DOE methodology.
• Experience with Microelectronic packaging technologies such as flip chip bumping, wafer backend processing, SMT, flip chip attach, flux cleaning, overmold, package marking, dicing, test, and packaging for shipment.

Pay

$122,199.70 - 158,868.41 per year

Schedule

N/A