Senior FPGA Engineer (Teradyne, North Reading, MA)

About the role

The Integrated Systems Test (IST) Hardware Engineering team at Teradyne is seeking a Senior FPGA Engineer to contribute to the development of cutting-edge storage and system-level test equipment.

Responsibilities

• Develop FPGA designs for new storage and system test equipment
• Collaborate with cross-functional teams to write FPGA specifications meeting overall product requirements
• Drive FPGA design from initial architecture through implementation and verification
• Contribute to FPGA portion of hardware design (device selection, pinout, peripherals)
• Support firmware and software engineering during integration phase and board bring-up
• Hands-on debugging using lab equipment (logic analyzers, oscilloscopes, etc.) and JTAG tools

Requirements

• 5+ years of working with FPGA design, implementation, and verification
• Experience writing Verilog for synthesis on FPGA devices
• Experience implementing FPGA designs using AMD (Xilinx) and/or Intel (Altera) tools, including configuring IP and creating timing constraints
• Proven design experience creating Verilog modules for SerDes, PCIe, ADCs and DACs, DDR memory, USB, AXI4, I2C, SPI, etc.
• Successfully build verification, test benches, and testing environments for new features
• Understanding of schematics and digital circuit design
• Experience performing FPGA feature validation on a hardware platform
• Able to interact and communicate effectively with a variety of personnel and cultures
• Experience with System Verilog for verification and/or UVM environments
• Experience with FPGA SoC devices and their processor subsystems
• Basic scripting using TCL or Python
• Understanding of revision control systems
• Experience with control systems

Qualifications

• Master's degree in Electrical Engineering or related field
• Strong understanding of digital logic design and VHDL/Verilog programming
• Experience with FPGA-based test equipment and systems
• Knowledge of test and measurement standards and protocols

Skills

• FPGA design and implementation
• System Verilog and UVM for verification
• Debugging and troubleshooting
• Team collaboration and communication

Benefits

• Medical, dental, and vision coverage
• Flexible spending accounts
• Roth and traditional 401(k) plans
• Paid vacation and holidays
• Tuition assistance programs
• Life and disability insurance

Pay

The base salary range for this role is $111,300 - $178,200. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Schedule

Full-time position