Senior FPGA Engineer

Qualifications

• You Must Have:
  • A degree in Science, Technology, Engineering or Mathematics (STEM) or an Advanced Degree in a related field
  • A minimum of 5 years prior relevant experience or 3 years of experience with an Advanced Degree
  • An active U.S. government issued Final Secret Security Clearance
  • A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
  • Proficient in VHDL/Verilog for FPGA/ASIC design and implementation
  • Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
  • Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero)
  • Strong debugging and troubleshooting skills for FPGA/ASIC systems
  • Proficiency with revision control concepts and tools (e.g., Git, Subversion)
• We Prefer:
  • Excellent communication and teamwork skills with the ability to work in a collaborative environment
  • Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet)
  • Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
  • Experience in ASIC / FPGA lab validation using advanced laboratory equipment
  • Experience with Unix, scripting, C/C++, and/or Perl