Senior Digital Design Verification Engineer - Hardware

About the role

NVIDIA is seeking a Senior Digital Design Verification Engineer to join our dynamic team. This position involves verifying the design and implementation of cutting-edge SerDes IPs, which will enable and accelerate various fields including gaming, artificial intelligence, deep learning, and autonomous driving.

Responsibilities

• Verification of the digital design, golden models, and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM.
• Build reusable bus functional models, monitors, checkers, and scoreboards following coverage-driven verification methodology.
• Responsible for understanding the design and implementation, defining the verification scope, developing the verification infrastructure, and verifying the correctness of the design.
• Write and implement test plans and thoroughly verify designs in a product shipment-focused/compressed schedule.
• Work with architects, designers, and pre/post silicon verification teams to accomplish tasks.

Requirements

• Bachelor's or Master's Degree (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering.
• At least 5 years of validated experience in verification at unit/sub-system/SoC level and expertise in SystemVerilog.
• Experience using random stimulus along with functional coverage and assertion-based verification methodologies.
• Experience in verification methodologies like UVM/VMM and exposure to industry-standard verification tools for simulation and debug.

Qualifications

• Expertise in bus or interconnect protocols (e.g., PCI Express, USB, SATA) is a plus.
• Experience in verifying complex SerDes systems, understanding mixed-signal designs, and having experience in modeling analog circuits is a plus.
• Perl, Python, C/C++ programming language experience.
• Good debugging and analytical skills.
• Good interpersonal skills and a desire to work as a phenomenal teammate.

Benefits

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $136,000 - $218,500 for Level 3, and $168,000 - $264,500 for Level 4. You will also be eligible for equity and benefits.

Pay

The base salary range is $136,000 - $218,500 for Level 3, and $168,000 - $264,500 for Level 4.

Schedule

Not specified.

Benefits

Not specified.

Skills

• SystemVerilog
• UVM/VMM
• Random stimulus
• Functional coverage
• Assertion-based verification
• Bus or interconnect protocols (PCI Express, USB, SATA)
• Mixed-signal designs
• Analog circuit modeling
• Perl, Python, C/C++ programming