Jobs · Engineering · Washington

Senior ASIC Design Engineer

HP · Vancouver, WA · Yesterday
On-siteEngineering$116k–$182k/yrFull-time

Responsibilities

  • Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification.
  • This includes RTL coding, verification, silicon validation, and qualification.
  • Proactively work with other team members and partners to align on specifications, drive reviews, and complete documentation.
  • Manage and expand relationships with internal and external development partners.
  • Be a key contributor to ASIC roadmaps and future innovation.
  • Lead cross-discipline task force to triage product HW & FW integration issues to deliver robust solutions.
  • Contribute to key areas of Inkjet and Laserjet print architecture and data path requirements.
  • Be a key contributor to co-development activities to help prototype ASIC designs in FPGA or other software models to support pre-silicon firmware development and verification.
  • Drive design methodology and tool automation work as needed.

Requirements

  • BS or MS degree in electrical engineering or equivalent with focus on VLSI design experience.
  • 8 - 10 years of ASIC or SOC design and development experience.

Education And Experience

  • Deep knowledge of submicron semiconductor technology.
  • Deep knowledge of embedded system design, verification, and product development lifecycle.
  • Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization.
  • Very familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
  • Very familiar with design and programming languages: Verilog, SV, Python, Perl, C, C++, etc.
  • Very familiar with code base management method including subversion, git, GitHub, etc.
  • Excellent analytical and problem-solving skills.
  • Excellent written and verbal communication skills, ability to negotiate design features and options.
  • Working knowledge of electronic components, PCA designs and use of test equipment.
  • Deep knowledge and domain know-hows in one or more areas below is a big plus:
  • Laserjet printing technology
  • ARM microprocessor subsystem
  • Memory and storage subsystem (DDR, Flash, eMMC, etc.)
  • Design database management, scripting and other design flow automation
  • Proficiency in applying AI Copilot (LLM-based tools) to accelerate ASIC design, verification, and engineering productivity.

Qualifications

  • Working knowledge of electronic components, PCA designs and use of test equipment.
  • Deep knowledge and domain know-hows in one or more areas below is a big plus:
  • Laserjet printing technology
  • ARM microprocessor subsystem
  • Memory and storage subsystem (DDR, Flash, eMMC, etc.)
  • Design database management, scripting and other design flow automation
  • Proficiency in applying AI Copilot (LLM-based tools) to accelerate ASIC design, verification, and engineering productivity.

Skills

  • Deep knowledge of submicron semiconductor technology.
  • Deep knowledge of embedded system design, verification, and product development lifecycle.
  • Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization.
  • Very familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
  • Very familiar with design and programming languages: Verilog, SV, Python, Perl, C, C++, etc.
  • Very familiar with code base management method including subversion, git, GitHub, etc.
  • Excellent analytical and problem-solving skills.
  • Excellent written and verbal communication skills, ability to negotiate design features and options.
  • Working knowledge of electronic components, PCA designs and use of test equipment.
  • Deep knowledge and domain know-hows in one or more areas below is a big plus:
  • Laserjet printing technology
  • ARM microprocessor subsystem
  • Memory and storage subsystem (DDR, Flash, eMMC, etc.)
  • Design database management, scripting and other design flow automation
  • Proficiency in applying AI Copilot (LLM-based tools) to accelerate ASIC design, verification, and engineering productivity.

Pay

The pay range for this role is $116,150 to $182,400 USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only).

Schedule

Pay varies by work location, job-related knowledge, skills, and experience.

Benefits

HP offers a comprehensive benefits package for this position, including:

  • Health insurance
  • Dental insurance
  • Vision insurance
  • Long term/short term disability insurance
  • Employee assistance program
  • Flexible spending account
  • Life insurance
  • Generous time off policies, including;
  • 4-12 weeks fully paid parental leave based on tenure
  • 11 paid holidays
  • Additional flexible paid vacation and sick leave (US benefits overview)

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