Jobs · Engineering · California

Senior ASIC Design Engineer

NVIDIA AI · Santa Clara, CA · Yesterday
HybridEngineeringFull-time

About the role

NVIDIA is seeking a Senior ASIC Design Engineer to join their GPU Design team. This position offers opportunities to contribute to cutting-edge projects that span from consumer graphics to self-driving cars and AI.

Responsibilities

  • Implement, document, and deliver high-performance, area and power-efficient RTL to meet design targets and specifications.
  • Analyze architectural trade-offs based on features, performance requirements, and system limitations.
  • Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing, and back-end teams to accomplish tasks.
  • Work on a variety of IPs such as GPU work schedulers, time distribution systems, interrupt controllers, and DMA engines.
  • Architect features to aid in silicon debugging and support post-silicon validation activities.

Requirements

  • Bachelor's degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of relevant work experience.
  • Experience in micro-architecture and RTL development using Verilog.
  • Strong understanding of ASIC design flow, including RTL design, verification, logic synthesis, and timing analysis.
  • Exposure to digital systems, VLSI design, computer architecture, and computer arithmetic.
  • Excellent interpersonal skills and teamwork abilities.

Qualifications

  • Strong C/C++, Python, or Perl skills.
  • Good debugging and analytical skills.

Benefits

The base salary range for this position is $168,000 - $264,500 for Level 4 and $196,000 - $310,500 for Level 5. Additional benefits include equity and comprehensive health insurance.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

Schedule

This posting is for an existing vacancy. Applications will be accepted until July 19, 2026.

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