Senior ASIC Design Efficiency Engineer

About the role

NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded, and datacenter platforms. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Responsibilities

• Develop innovative HW, GPU, and system designs to extend the state-of-the-art performance and efficiency.
• Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power, and Area (PPA) improvements.
• Execute and deliver fully verified, high-performance, area- and power-efficient RTL to achieve design targets.
• Collaborate with architects, designers, verification, and VLSI teams to craft the industry's top-performing GPUs.

Requirements

• Bachelor's Degree in EE or CE or equivalent experience.
• 12+ years of experience.
• Proficiency in SystemVerilog or similar HDL.
• Solid understanding of logic design and computer architecture.
• Strong interpersonal skills and ability to work in a diverse product-oriented team.

Skills

• Pipeline processor or deep learning accelerator design/architecture experience (preferred).
• Performance verification, low power, or physical (synthesis/VLSI) design experience (preferred).
• Scripting knowledge in Python/Perl (preferred).

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and benefits.

JR2022622