Semiconductor Device Modeling Engineer
About the role
Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. As a member of the Compact Device Modeling Group (CDMG), part of Intel's Design Technology Platform (DTP) organization, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology. Your work will directly enable design teams to get to market faster with leadership products based on innovative technologies.
As a semiconductor device modeling engineer, you will play a key role in supporting compact modeling activities for Intel's new technologies, enabling customers with diverse design needs to deliver best-in-class products for data-centric applications.
Responsibilities
- Develop and support compact models for Intel's advanced semiconductor technologies.
- Collaborate on the co-optimization of process technology for diverse design needs.
- Work on layout-dependent effects (LDE) for FinFET or GAAFET technologies and their impact on circuit performance.
- Develop methodologies for device targeting (e.g., transistors) and benchmarking circuits (e.g., ring oscillators), including corners and statistical variation models.
- Model using Open Model Interface (OMI).
- Address self-heating effects and their influence on device and circuit performance.
- Collaborate across multiple teams and geographies.
- Apply Python scripting for data analysis, automation, and documentation.
- Utilize extraction tools (e.g., ICCAP, MBP) and commercial simulators such as HSPICE, Spectre, etc.
- Explore machine learning algorithms for data analysis and compact model development.
Requirements
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering or a related discipline and 5+ years of industry experience in the semiconductor field; or
- Master's degree in Electrical Engineering or a related discipline and at least 3 years of industry experience in the semiconductor field; or
- Ph.D. in Electrical Engineering or a related discipline.
- Graduate coursework or research experience in semiconductor device physics or 5+ years of work experience in semiconductor device physics.
- 1+ years' experience with Python scripting for data analysis, automation, and documentation.
Preferred Qualifications:
- Ph.D. in Electrical Engineering or a related discipline with 3+ years of industry experience in the semiconductor field.
- Proficiency with extraction tools (e.g., ICCAP, MBP) and commercial simulators such as HSPICE, Spectre, etc.
- Hands-on experience with BSIM-CMG and other compact models for transistor modeling at advanced nodes (e.g., FinFET, GAA).
- Experience in one or more of the following areas:
- Development of methodologies for device targeting and benchmarking circuits.
- Modeling using Open Model Interface (OMI).
- Strong understanding of process flow, layout, and basic circuit design/simulation.
- Modeling self-heating effects and their influence on device and circuit performance.
- Proven capability to collaborate across multiple teams and geographies.
- Experience with machine learning algorithms and their application in data analysis and compact model development.
Benefits
Intel offers a total rewards package that goes above and beyond just a paycheck. Benefits include:
- Competitive pay and stock bonuses.
- Health, retirement, and vacation benefit programs.
For more details, visit Intel Benefits.
Pay
Annual Salary Range for jobs which could be performed in the US: $128,880.00 - $245,160.00 USD. The range reflects the minimum and maximum target compensation for the position across all US locations. Individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Schedule
This role requires an on-site presence (Shift 1 in the United States of America). Primary locations include US, Oregon, Hillsboro and US, California, Santa Clara.