Quality Reliability Engineer

About the Role

The Board-Level Quality and Reliability Engineer ensures the quality, robustness, and long-term reliability of advanced semiconductor products throughout development, qualification, and production. This role provides technical leadership in board-level reliability assessment, failure analysis, qualification methodology development, risk management, and industry standards engagement. The engineer serves as the technical authority for board-level reliability of advanced packages, including BGA, LGA, and heterogeneous integration technologies, and leads reliability strategy development, qualification planning, and failure mechanism assessments while partnering with product development, packaging, manufacturing, suppliers, and customers.

Active participation and technical leadership within JEDEC and other industry standards organizations are required to influence future reliability requirements, qualification methodologies, and semiconductor packaging standards. Key industry forums include JEDEC quality and reliability committees (JC-14).

Responsibilities

• Develop qualification plans covering thermal cycling, mechanical shock, vibration, drop, power cycling, humidity, and use-condition testing.
• Establish reliability requirements and acceptance criteria based on customer, market, and business needs.
• Lead risk assessments using FMEA, fault tree analysis, and reliability growth methodologies.
• Develop reliability demonstration plans and statistical confidence strategies.
• Lead complex reliability investigations and root-cause analyses.
• Drive corrective and preventive actions across product design, materials, assembly, and manufacturing processes.
• Perform Weibull analysis, DOE studies, and reliability statistics.
• Represent the company within JEDEC, IPC, AEC, and related standards organizations.
• Actively contribute to JEDEC JC-14 Quality and Reliability committees and subcommittees.
• Author, review, and ballot industry standards, technical publications, and qualification methodologies.
• Collaborate with cross-functional teams consisting of design, process, manufacturing, quality, and supplier engineering organizations.
• Communicate technical findings and reliability risks to stakeholders clearly and concisely.
• Prepare technical reports, failure analysis summaries, and reliability assessments.

Requirements

• Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Reliability Engineering, Physics, or related technical field with 3+ years of industry experience, OR Ph.D. in the same fields with 1+ years of industry experience.
• Experience in semiconductor package, board-level, or electronic system reliability.
• Knowledge of reliability qualification methodologies including thermal cycling, mechanical shock, vibration, temperature-humidity testing, and accelerated stress testing.
• Understanding of solder interconnect reliability, PCB technologies, SMT assembly processes, and package-to-board interactions.
• Experience supporting failure analysis investigations and root cause determination.
• Familiarity with reliability statistics, Weibull analysis, Design of Experiments (DOE), and data analysis techniques.
• Working knowledge of FMEA, risk assessment methodologies, and reliability qualification planning.
• Familiarity with JEDEC reliability and qualification standards.
• Interest in participating in industry standards organizations and technical working groups.
• Ability to represent company positions in technical discussions with customers, suppliers, and industry partners.

Preferred Qualifications

• Experience with advanced semiconductor packaging technologies including FCBGA, flip-chip, heterogeneous integration, chiplet-based architectures, or 2.5D/3D packaging.
• Experience conducting board-level reliability testing and data interpretation.
• Knowledge of thermo-mechanical failure mechanisms including solder fatigue, pad cratering, substrate cracking, delamination, and warpage effects.
• Familiarity with finite element modeling (FEM) or physics-of-failure approaches.
• Prior participation in JEDEC, IPC, or similar industry standards activities.
• Experience reviewing or contributing to reliability specifications, qualification requirements, or industry guidance documents.
• Attendance at industry conferences, technical symposiums, or standards committee meetings.
• Demonstrated initiative in driving reliability improvements and problem-solving efforts.
• Ability to manage multiple projects and priorities in a fast-paced development environment.
• Track record of successfully influencing technical decisions through data-driven analysis.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Pay

Annual Salary Range for jobs which could be performed in the US: $120,860.00 - $170,630.00 USD. The range reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Schedule

This role requires an on-site presence (Shift 1).