Principal System Level Product Engineer

Location: Austin, Texas

About the role

Arm has an exciting opportunity for a Principal System Level Product Engineer in our Product Engineering team. You will work with Architecture, SoC Design, Validation, Test, System, Software, and Quality teams throughout the company to guide manufacturability of pioneering designs across foundry/assembly and own the manufacturing flow at SLT. You will play a key role in preparing Arm and our partners on how to introduce new products in areas such as 2.5D/3DIC and sub-3nm nodes. The role drives industry-leading products from pre-silicon readiness through post-silicon bring-up, focusing on power, performance, cost, and manufacturability.

Responsibilities

• Work with line-of-business and architecture teams to understand product requirements.
• Own technical pre/post-silicon operations cross product engineering, aligning cross-functionally with design, packaging, software, silicon validation, test, and quality.
• Be the point of contact for the Product Engineering team for multi-functional collaborators.
• Work with partners on enhancing yield and characterization methodologies, using integrated sensor frameworks and yield mitigation strategies.
• Own post-silicon manufacturing test flow, yield improvement, system-level qualification, failure debug, and SOC testing at SLT.
• Drive correlation and validation of VF margins used for SLT testing, correlating functional failures to ATE and execute shift-left strategies.
• Up to 20% travel within the US and internationally for company and partner meetings.

Requirements

• Bachelor’s, Master’s, or Ph.D. degree in Electrical or Computer Engineering, with a strong CPU, SOC, or GPU silicon bring-up and product engineering background.
• Minimum 10 years of experience in system-level product engineering, including manufacturing test, yield improvement, silicon characterization, and system-level reliability qualification.
• Broad expertise in bare-metal testing and functional testing concepts for SOC testing (compute subsystem and high-speed PHYs: UCIE/PCIE/DDR) and SW diagnostics framework.
• Strong understanding of device physics, digital/mixed-signal design, foundry and assembly process, and CPU/GPU/SoC power and performance dependencies.
• Proficiency in IC data tools such as Silicon.da/Optimal+ and analyzing data using JMP.
• Excellent interpersonal skills, strong initiative, and openness to engaging and learning new concepts while sharing with collaborators.

Skills

• Nice to have:
• Experience in system design and/or system architecture.
• Experience in system validation of high-speed IO.
• Software scripting skills using Python.

Pay

Salary Range: $249,900–$338,100 per year

The total reward package will be shared with candidates during the recruitment and selection process.