Principal Signal Integrity Engineer, Pathfinding
for each section heading. Use - for lists. Use
for prose.
We must not repeat job title as heading. No Job ID. Remove boilerplate: EEO, legal, application instructions, etc. Also remove "A Note to All Candidates", "Why This Role"? Actually "Why This Role" is substantive; could be part of About the role? Might be its own section? But we can incorporate into About the role or Responsibilities. The instruction: prefer few substantive sections over many thin ones. So we can have sections: About the role (includes vision, mission, team description), Responsibilities (combines What You’ll Work On and What You’ll Own), Requirements (What You Bring), Benefits, Pay.
We must preserve all substantive information; not invent or summarize away detail. Must not omit details. So we need to include all details from those sections.
Let's extract content.
About the role: first paragraph: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever." Then later: "As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption."
We need to keep that.
Responsibilities: combine "What You’ll Work On" and "What You’ll Own". Let's list bullet points.
What You’ll Work On:
- Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces.
- The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks.
- Key Signal Integrity Domains Include:
- Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies
- Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications
- Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations
- Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling
- Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes
What You’ll Own:
- Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team.
- Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations.
- Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed.
- Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
- Link Budgeting: Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions.
- Cross-Disciplinary Engagement: Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams.
- Design Documentation: Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs.
We can combine into a single list of responsibilities.
Requirements (What You Bring):
Required:
- MS or PhD in Electrical Engineering or related field (MS with strong electromagnetic/SI fundamentals accepted; PhD preferred but not sufficient on its own — demonstrated hands-on modeling and simulation capability is what differentiates)
- 10+ years of industry experience in signal or power integrity analysis applied to high-speed interface technologies
- Extensive experience applying electromagnetic and transmission line theory to SI/PI analysis of differential and single-ended interfaces
- Extensive experience with time- and frequency-domain simulation tools — ADS, HSPICE, SPECTRE, or equivalent
- Deep experience with electromagnetic field solvers — Q3D, SIWAVE, HFSS, or equivalent — including solver setup, mesh strategy, and result validation
- Working knowledge of hardware measurement tools — oscilloscopes, TDR, VNA — and their application to SI characterization
- Comfortable with broad ownership, cross-discipline collaboration, and making analytical decisions with real program consequences
- Strong written and verbal communication skills — this role produces modeling reports, link budgets, and design rule documents
Preferred:
- Familiarity with memory I/O architectures and their signal integrity constraints
- Experience with advanced packaging technologies — 2.5D/3D integration, embedded die, or high-density organic substrates — and their electromagnetic modeling challenges
- Post-silicon characterization experience — correlating simulation predictions to measured TDR, insertion loss, eye diagrams, or BER results
- Some familiarity with modeling optical links
- Willingness to learn and apply Artificial Intelligence -based methods to streamline modeling and simulation workflows
- Prior experience in a pathfinding or advanced development environment where analysis methodology is actively developed, not inherited
We need to keep all that.
Benefits: The posting includes: "As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits."
We should keep that prose.
Pay: "The US base salary range that Micron Technology estimates it could pay for this full-time position is: $119,000.00 - $320,000.00 a year Additional Compensation May Include Benefits, Bonuses And Equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits."
We need to keep that.
We should not include Schedule.
Now produce HTML fragment with sections.
Structure:
About the role
... (combined paragraphs)
Responsibilities
- ... each bullet
...
Requirements
- ... required items maybe as sub-bullets? Could just list each as li.
...
Maybe separate required and preferred? Could keep as separate but not allowed? Only headings allowed are . Could embed required and preferred as paragraphs inside li? Better to keep as separate for required and preferred? But that would be multiple lists under same heading; still okay.
We'll do:
Requirements
Required:
- ...
...
Preferred:
- ...
...
That's okay.
Benefits
...
Pay
...
Make sure no extra whitespace? It's fine.
Now craft the HTML.
Let's write the about role paragraph: combine the two paragraphs.
Paragraph1: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever."
Paragraph2: "As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption."
Combine into one maybe two
but we can keep as one
with line breaks? Better to keep as one
containing both sentences.
Now responsibilities list: need to include all bullet points.
Let's list them as
- items.
I'll create list items:
- Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces.
- The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks.
- Key Signal Integrity Domains Include:
- Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies
- Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications
- Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations
- Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling
- Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes
- Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team.
- Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations.
- Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed.
- Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
for prose. We must not repeat job title as heading. No Job ID. Remove boilerplate: EEO, legal, application instructions, etc. Also remove "A Note to All Candidates", "Why This Role"? Actually "Why This Role" is substantive; could be part of About the role? Might be its own section? But we can incorporate into About the role or Responsibilities. The instruction: prefer few substantive sections over many thin ones. So we can have sections: About the role (includes vision, mission, team description), Responsibilities (combines What You’ll Work On and What You’ll Own), Requirements (What You Bring), Benefits, Pay. We must preserve all substantive information; not invent or summarize away detail. Must not omit details. So we need to include all details from those sections. Let's extract content. About the role: first paragraph: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever." Then later: "As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption." We need to keep that. Responsibilities: combine "What You’ll Work On" and "What You’ll Own". Let's list bullet points. What You’ll Work On: - Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. - The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. - Key Signal Integrity Domains Include: - Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies - Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications - Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations - Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling - Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes What You’ll Own: - Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team. - Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations. - Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed. - Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data. - Link Budgeting: Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions. - Cross-Disciplinary Engagement: Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams. - Design Documentation: Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs. We can combine into a single list of responsibilities. Requirements (What You Bring): Required: - MS or PhD in Electrical Engineering or related field (MS with strong electromagnetic/SI fundamentals accepted; PhD preferred but not sufficient on its own — demonstrated hands-on modeling and simulation capability is what differentiates) - 10+ years of industry experience in signal or power integrity analysis applied to high-speed interface technologies - Extensive experience applying electromagnetic and transmission line theory to SI/PI analysis of differential and single-ended interfaces - Extensive experience with time- and frequency-domain simulation tools — ADS, HSPICE, SPECTRE, or equivalent - Deep experience with electromagnetic field solvers — Q3D, SIWAVE, HFSS, or equivalent — including solver setup, mesh strategy, and result validation - Working knowledge of hardware measurement tools — oscilloscopes, TDR, VNA — and their application to SI characterization - Comfortable with broad ownership, cross-discipline collaboration, and making analytical decisions with real program consequences - Strong written and verbal communication skills — this role produces modeling reports, link budgets, and design rule documents Preferred: - Familiarity with memory I/O architectures and their signal integrity constraints - Experience with advanced packaging technologies — 2.5D/3D integration, embedded die, or high-density organic substrates — and their electromagnetic modeling challenges - Post-silicon characterization experience — correlating simulation predictions to measured TDR, insertion loss, eye diagrams, or BER results - Some familiarity with modeling optical links - Willingness to learn and apply Artificial Intelligence -based methods to streamline modeling and simulation workflows - Prior experience in a pathfinding or advanced development environment where analysis methodology is actively developed, not inherited We need to keep all that. Benefits: The posting includes: "As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits." We should keep that prose. Pay: "The US base salary range that Micron Technology estimates it could pay for this full-time position is: $119,000.00 - $320,000.00 a year Additional Compensation May Include Benefits, Bonuses And Equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits." We need to keep that. We should not include Schedule. Now produce HTML fragment with sections. Structure:
About the role
... (combined paragraphs)
Responsibilities
- ... each bullet ...
Requirements
- ... required items maybe as sub-bullets? Could just list each as li. ...
but not allowed? Only headings allowed are . Could embed required and preferred as paragraphs inside li? Better to keep as separate for required and preferred? But that would be multiple lists under same heading; still okay.
We'll do:
Requirements
Required:
- ...
...
Preferred:
- ...
...
That's okay.
Benefits
...
Pay
...
Make sure no extra whitespace? It's fine.
Now craft the HTML.
Let's write the about role paragraph: combine the two paragraphs.
Paragraph1: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever."
Paragraph2: "As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption."
Combine into one maybe two
but we can keep as one
with line breaks? Better to keep as one
containing both sentences.
Now responsibilities list: need to include all bullet points.
Let's list them as
- items.
I'll create list items:
- Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces.
- The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks.
- Key Signal Integrity Domains Include:
- Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies
- Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications
- Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations
- Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling
- Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes
- Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team.
- Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations.
- Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed.
- Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
- for required and preferred? But that would be multiple lists under same heading; still okay.
We'll do:
- ... ...
- ... ...
- items. I'll create list items: - Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. - The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. - Key Signal Integrity Domains Include: - Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies - Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications - Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations - Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling - Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes - Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team. - Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations. - Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed. - Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
Requirements
Required:
Preferred:
Benefits
...
Pay
...
Make sure no extra whitespace? It's fine. Now craft the HTML. Let's write the about role paragraph: combine the two paragraphs. Paragraph1: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever." Paragraph2: "As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption." Combine into onemaybe two
but we can keep as one
with line breaks? Better to keep as one
containing both sentences. Now responsibilities list: need to include all bullet points. Let's list them as