Jobs · OTHR · California

Principal Signal Integrity Engineer, Pathfinding

Micron Technology · Folsom, CA · 3 wk ago
OTHR$119k–$320k/yrFull-time
We need to output HTML fragment with sections: About the role, Responsibilities (maybe "What You’ll Work On" and "What You’ll Own"), Requirements (What You Bring), Benefits, Pay (salary range), maybe Schedule not present. Also include "Why This Role" maybe as part of About? But we need sections only when real content. We'll include: About the role (the paragraph after "About The Role"), Responsibilities (combine "What You’ll Work On" and "What You’ll Own"), Requirements (What You Bring), Benefits (benefits paragraph), Pay (salary range). Also maybe "Why This Role" could be part of About or separate but we can include as part of About? The instruction: use

for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). So we can have About the role, Responsibilities, Requirements, Benefits, Pay. Not include Qualifications/Skills unless present; we have qualifications in Requirements. We'll not duplicate. We must preserve all substantive info, not invent. Remove boilerplate: EEO, navigation, cookie, application instructions, etc. Also remove "A Note to All Candidates", "Why This Role" maybe keep as part of About? It's substantive but not a standard heading; we could incorporate into About the role paragraph. But we could also add a separate section "Why This Role" but not in list of allowed headings? The list includes examples, not exclusive. But safer to stick to allowed headings. We can incorporate "Why This Role" content into About the role or Responsibilities. Probably better to add a separate section "Why This Role" as it's substantive. But the instruction says use

for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). It doesn't forbid other headings, but says use those for section headings. Likely they expect only those headings. We'll follow that. Thus sections:

About the role

... (including the vision paragraph and the description of role, plus maybe "Why This Role" content? We'll incorporate the "Why This Role" paragraph into About the role.

Responsibilities

  • ... list items from "What You’ll Work On" and "What You’ll Own". We need to preserve all details. We'll combine them into bullet points. We need to extract bullet-like sentences. From "What You’ll Work On": list of domains: - Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies - Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications - Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations - Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling - Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes From "What You’ll Own": list: - Interconnect Modeling: Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team. - Technology Evaluation: Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations. - Feasibility Analysis: Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed. - Design Rule Definition: Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data. - Link Budgeting: Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions. - Cross-Disciplinary Engagement: Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams. - Design Documentation: Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs. We'll combine into bullet list, maybe deduplicate similar items (Interconnect Modeling appears both). We'll keep both but could merge. Better to keep all distinct points. We'll produce
    • each.

      Requirements

      ... include required education, experience, etc. Also Preferred items maybe separate? Could include as part of Requirements but we could separate into Preferred? Not in allowed headings. We'll include both required and preferred within Requirements paragraph, maybe separate sentences. We must preserve all substantive info: Required MS or PhD, 10+ years experience, extensive experience with EM theory, simulation tools, field solvers, hardware measurement tools, comfort with ownership, communication skills. Preferred: familiarity with memory I/O architectures, advanced packaging, post-silicon characterization, optical links, AI-based methods, pathfinding environment. We'll include them.

      Benefits

      ... paragraph about benefits: medical, dental, vision, income protection, paid family leave, paid time-off, paid holidays, benefits guide link. We must not include boilerplate like EEO etc. So we stop before that.

      Pay

      ... salary range: $119,000.00 - $320,000.00 a year, plus note about additional compensation may include benefits, bonuses and equity. Also note that salary ranges determined by role, level, location, etc. We'll include that. We must not include schedule. Now produce HTML fragment only. Check for any duplicated lines: we need to avoid repeating same content. We'll ensure each piece appears once. Let's craft. About the role paragraph: combine initial vision and role description. Original: "Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal Signal Integrity Engineer — Interface Pathfinding About The Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption." We also have "Why This Role" paragraph: "You will do original signal integrity analysis on problems that matter — developing the interconnect models and channel solutions that define what high-speed memory and die-to-die interfaces can achieve.You will work alongside genuinely exceptional engineers — spanning analog design, chip design, packaging R&D, and system integration — in an environment where SI analysis directly shapes architectural decisions.The team is intentionally small and senior — decisions get made quickly, bureaucracy is minimal, and your technical judgment will be trusted.You are joining an active program with real momentum — your analytical leadership will directly shape its trajectory and scope.This is a long-term opportunity — strong execution early creates compounding impact as the program scales." We'll incorporate that into About the role paragraph after the role description. Thus About the role paragraph will be long but okay. Now Responsibilities bullet list. We'll list each bullet as

    • ...
    • . We need to ensure we don't miss any. Let's list: - Interconnect Modeling — Generating and validating electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies - Substrate & Packaging Evaluation — Assessing next-generation substrate technologies and providing strategic direction on their signal integrity implications - Channel & I/O Co-Optimization — Performing SI analysis during feasibility studies and driving I/O + channel co-optimization, including coordination with supporting organizations - Design Rule Development — Driving progressive design rules that enable package and system-level performance scaling - Link Budgeting & Sim-to-Silicon Correlation — Establishing forward-looking link budgets and developing methodologies that connect simulation predictions to measured silicon outcomes - Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team. - Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations. - Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed. - Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data. - Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions. - Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams. - Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs. We could combine similar but it's okay. Now Requirements paragraph. We'll write: Required: MS or PhD in Electrical Engineering or related field (MS with strong electromagnetic/SI fundamentals accepted; PhD preferred but not sufficient on its own — demonstrated hands-on modeling and simulation capability is what differentiates); 10+ years of industry experience in signal or power integrity analysis applied to high-speed interface technologies; extensive experience applying electromagnetic and transmission line theory to SI/PI analysis of differential and single-ended interfaces; extensive experience with time- and frequency-domain simulation tools — ADS, HSPICE, SPECTRE, or equivalent; deep experience with electromagnetic field solvers — Q3D, SIWAVE, HFSS, or equivalent — including solver setup, mesh strategy, and result validation; working knowledge of hardware measurement tools — oscilloscopes, TDR, VNA — and their application to SI characterization; comfortable with broad ownership, cross-discipline collaboration, and making analytical decisions with real program consequences; strong written and verbal communication skills — this role produces modeling reports, link budgets, and design rule documents. Preferred: familiarity with memory I/O architectures and their signal integrity constraints; experience with advanced packaging technologies — 2.5D/3D integration, embedded die, or high-density organic substrates — and their electromagnetic modeling challenges; post-silicon characterization experience — correlating simulation predictions to measured TDR, insertion loss, eye diagrams, or BER results; some familiarity with modeling optical links; willingness to learn and apply Artificial Intelligence‑based methods to streamline modeling and simulation workflows; prior experience in a pathfinding or advanced development environment where analysis methodology is actively developed, not inherited. We'll put in

      . Now Benefits paragraph. We'll copy: "As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits." We must not include the EEO etc after that. Now Pay paragraph. We'll include: "The US base salary range that Micron Technology estimates it could pay for this full-time

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