Principal Physical Design Engineer
Responsibilities
Lead and execute Physical Design activities at block, sub-chip, and full-chip levels.
Contribute to Physical Design flow development, automation, and methodology improvements.
Evaluate and recommend technology nodes, IP selection, EDA tools, and vendor solutions.
Provide clear and concise status updates on progress, risks, and mitigation plans to management.
Operate independently with minimal supervision while maintaining strong attention to detail.
Support program needs, including occasional travel as required.
Drive all phases of implementation including: Floorplanning, Synthesis, Placement and Optimization, Clock Tree Synthesis (CTS) and custom clocking, Routing, Static Timing Analysis (STA), Physical Verification, Formal Equivalency, Power optimization and efficiency analysis, IR-drop and Electromigration (EM) analysis.
Qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
OR equivalent experience. - Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
- Experience in physical design implementation, signoff at block / sub system / sub-chip / SoC level.
Experience in tapeouts of complex ASICs in leading edge technology.
Experience in leading team to deliver planned PD goals.