Principal / Lead DSP & Systems Architect — Ultra High-Speed SerDes

About the role

The Principal / Lead DSP & Systems Architect is responsible for designing and leading the development of ultra-high-speed SerDes systems within our cutting-edge technology team. This role requires a deep understanding of digital signal processing and system architecture to ensure that our products meet the highest standards of performance and reliability.

Responsibilities

• Design and optimize high-speed SerDes interfaces for next-generation communication systems.
• Collaborate with cross-functional teams including hardware engineers, software developers, and quality assurance specialists to develop and validate complex systems.
• Lead the architectural design of high-performance DSP subsystems, ensuring they are scalable and maintainable.
• Contribute to the development of technical specifications and roadmaps for new product features.
• Provide technical guidance and mentorship to junior members of the team.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 8 years of relevant experience in DSP and/or SerDes design.
• Experience with high-speed serial interface protocols such as PCIe, USB, and Ethernet.
• Strong knowledge of digital signal processing techniques and algorithms.
• Proficiency in C/C++, Verilog, VHDL, or similar programming languages.
• Experience with FPGA design and testing.
• Excellent problem-solving skills and ability to work independently and as part of a team.

Qualifications

• Proven track record of delivering high-quality designs on time and within budget.
• Ability to manage multiple projects simultaneously and prioritize tasks effectively.
• Strong written and verbal communication skills.
• Passion for innovation and a commitment to excellence in engineering.

Skills

• Advanced knowledge of digital signal processing techniques and algorithms.
• Experience with high-speed serial interface protocols such as PCIe, USB, and Ethernet.
• Proficiency in C/C++, Verilog, VHDL, or similar programming languages.
• Experience with FPGA design and testing.

Benefits

• Competitive salary commensurate with experience.
• Flexible working hours and remote work options.
• Health insurance, dental, and vision plans.
• 401(k) retirement plan with company match.
• Annual performance-based bonuses.
• Professional development opportunities and training programs.

Pay

Salary range: $150,000 - $200,000 per year, commensurate with experience.

Schedule

Full-time position with flexible working hours.