Principal Engineer SOC/ASIC Design

About the Role

Qualcomm's Cloud Business Unit is building next-generation AI inference rack scale solutions, anchored by the AI200/AI250 accelerator family. We are seeking a seasoned and experienced ASIC/Chip designer to work on the next generation AI products in the datacenter. This role requires expertise spanning the chip development process from early architecture phase to post-silicon commercialization, working in leading technology nodes and processes to innovate and deliver next-generation products.

Responsibilities

• Develop architecture and module specifications
• Analyze performance, area, power, and system cost tradeoffs for different implementations
• Provide guidance to different IP teams regarding product requirements
• Work with SOC team in defining the execution plan encompassing design, DV, synthesis, DFT, PD phases leading to tapeout
• Work with Packaging team to develop System-In-Package (SIP) encompassing SOC and different memory/compute chips
• Define and monitor pre-Silicon functional and performance validation plans followed by same on Silicon
• Coordinate with Production Test Engineering to drive commercialization rollout
• Work with datacenter SW and HW teams for deployment in the datacenter

Requirements

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience
• OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience
• OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience

Preferred Qualifications

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
• 12+ years of ASIC design, verification, validation, integration, or related work experience
• 4+ years of experience with architecture and design tools
• 4+ years of experience with scripting tools and programming languages
• 4+ years of experience with design verification methods
• 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Vice President level and above)
• 1+ year of working with operating budgets and/or project financials

Pay

$172,800.00 - $259,200.00

Benefits

• Competitive annual discretionary bonus program
• Annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus)
• Highly competitive benefits package designed to support success at work, at home, and at play