Jobs · OTHR · California

Principal Engineer, ASIC Design

Micron Technology · San Jose, CA · 1 mo ago
OTHR$198k–$336k/yrFull-time

Responsibilities

  • Design, implement, and debug complex RTL logic and integrate IP into larger subsystems
  • Support front-end design flow including lint, CDC, synthesis, and ECO activities
  • Collaborate with SOC design, verification, STA, and physical design teams to deliver high-quality silicon
  • Develop automation scripts to improve design efficiency and productivity
  • Use AI-assisted tools to enhance debugging, documentation, and code quality

Requirements

  • MS in Electrical Engineering or equivalent experience with 10+ years of ASIC design experience
  • Strong expertise in Verilog/SystemVerilog for RTL and/or testbench development
  • Deep understanding of digital ASIC design methodologies and full design flow
  • Experience with industry-standard tools such as Design Compiler, PrimeTime, or similar
  • Proven experience working on large-scale complex design projects

Qualifications

  • Experience with AMBA AXI/AHB interconnect protocols
  • Familiarity with storage or memory protocols such as NVMe, SCSI, CXL, or DDR
  • Experience with verification and CAD tools such as ncsim or Formality
  • Proficiency in Python or other programming languages for design automation
  • Familiarity with AI/ML concepts and applying AI-enabled features in EDA tools for productivity improvements

Skills

Strong ownership, collaboration, and the ability to leverage modern AI-assisted tools to improve engineering efficiency and quality.

Pay

The US base salary range that Micron Technology estimates it could pay for this full-time position is: $198,000.00 - $336,000.00 a year

Schedule

Full-time

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