Principal Engineer – HBM Design for Test (DFT)

Key Responsibilities

• Own and implement DFT architecture and feature intent for assigned DFT domains across HBM core die and base die
• Ensure DFT solutions enable high-quality, low-cost, and manufacturable HBM products
• Partner with Design Engineering, Product Engineering, Test, and DFT Verification to:
• Translate manufacturing and test needs into clear DFT requirements
• Ensure spec-to-verification coverage alignment for DFT features and test modes
• Identify and resolve DFT-related issues during build execution, tape-out, and silicon bring-up
• Serve as the DFT point of contact for assigned programs or functional areas
• Drive standardization and reuse of DFT features across HBM families.
• Participate in DFT governance activities, including design and verification readiness reviews.
• Contribute to documentation, knowledge sharing, and training within the DFT organization.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering or related field (Master’s preferred)
• 8+ years of experience in semiconductor development with exposure to DFT, verification, test strategy, manufacturability, or silicon debug.
• Working knowledge of memory architectures (HBM or DRAM preferred)
• Experience influencing DFT requirements, specifications, and verification expectations.