Pre/Post Silicon Validation Engineer

About the role

Meta's Infrastructure Silicon organization is building custom ASICs to power the compute demands of AI, data center, and next-generation platform workloads. We are looking for an experienced Silicon Validation Engineer to join our team, working across the full silicon lifecycle from early pre-silicon design input and FPGA emulation to post-silicon bring-up, characterization, and deployment in the production fleet. You will play a central role in validating custom silicon, driving emulation bring-up, and leading debug efforts across hardware, firmware, and software layers to ensure successful product delivery. Your work will directly influence the reliability and performance of Meta's custom infrastructure chips at scale.

Responsibilities

• Work across all aspects of the silicon lifecycle to deliver reliable, performant silicon - from early architecture and design input, through pre-silicon test readiness and validation, to post-silicon bring-up, characterization, and fleet deployment
• Define and execute silicon validation strategies, including test plans, coverage models, regression frameworks, and productization readiness criteria
• Develop and maintain emulation infrastructure for custom silicon, including FPGA-based emulation platform bring-up and configuration
• Partition and map RTL designs onto emulation platforms, optimizing for timing closure, resource utilization, and debug visibility
• Build and maintain software, scripting, and automation infrastructure for validation and emulation workflows, including silicon diagnostics, performance analysis, debug tooling, job scheduling, and results analysis across bare-metal and full-stack systems
• Debug complex hardware, firmware, and software interactions across RTL, firmware, and software layers
• root-cause, resolve, and remediate silicon issues across the product lifecycle
• Partner with RTL design and verification engineers to identify and resolve functional bugs prior to tape-out
• Ensure continuity between pre- and post-silicon environments so that emulation accurately models silicon behavior and validation content transitions cleanly into lab and data center bring-up
• Understand