Physical Design Engineer - Flow & Methodologies

Key Responsibilities

• Arcitect, build, and maintain our automated RTL-to-GDSII flow, from synthesis through place and route to signoff handoff.
• Automate PD flows end to end, including regression running, run management, and release and version control of flow configurations.
• Build and own the CAD infrastructure supporting PD, including tool version qualification and deployment, and efficient use of compute and licenses.
• Drive dashboards that show the convergence of projects related to PD, including timing, physical verification, and utilization trends.
• Optimize tool flows and work with EDA vendors to evaluate and incorporate the latest features.
• Define reference flows, QoR targets, and delivery checklists for 3rd party physical design services, and audit deliveries against them.
• Partner with block and top-level owners to debug flow issues and encode fixes into the methodology rather than one-off patches.
• Create block level and full chip level PG mesh from scratch using design rule documents, design requirements, and EM/IR feedback.
• Create and maintain a DRC-clean floorplanning flow and enable floorplan signoff checks.
• Drive PPA tuning to optimize tool settings for best power, performance, and area outcomes.
• Establish and maintain timing correlation from pre-route through post-route and between implementation and signoff tools.

Requirements

• 5-10+ years of previous experience with PD or PD methodology/CAD.
• Experience building and owning automated RTL-to-GDSII flows used by multiple block owners.
• Experience creating block level and full chip level PG mesh from scratch, including interpretation of design rule documents and EM/IR analysis.
• Experience with DRC-clean floorplanning flows and automated checks.
• Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows.
• Experience with PPA tuning and timing correlation across pre-route, post-route, and signoff environments.
• Experience integrating sign-off tools (PrimeTime, Tempus, Voltus, Pegasus, Calibre) into production flows.
• Experience with back-end design on advanced process nodes (5nm and below).
• Experience with UPF-based low power design methodology and multi-mode multi-corner setup.
• Strong Tcl and Python skills for flow development and automation.
• Deeply creative and able to think from first principles.