PCIe Subsystem Verification Engineer

Arm’s Solutions Engineering team is seeking experienced PCIe and CXL experts to verify the functionality and performance of High Speed IOs at the sub-system level. You will collaborate with architects, RTL design, and verification engineers across the UK, US, Canada, and India to build next-generation SoCs. This role contributes to Arm’s ambition to deliver industry-leading performance through advanced nodes (e.g., 3nm) and innovative SoC 3D packaging, targeting premium mobile, infrastructure, IoT, and automotive markets.

Responsibilities

• Develop and execute functional verification strategies for PCIe/CXL integration at the sub-system level, including IO virtualization scenarios with Arm SMMU and interoperability verification with Arm and third-party IPs.
• Review architecture and design specifications to craft detailed test plans.
• Design and implement SystemVerilog/Verilog/UVM testbenches and tests.
• Debug test failures and issues, improving verification methodologies.
• Collaborate with design teams on microarchitecture, verification methodologies, and system performance.
• Work with project management on activities, plans, and schedules.
• Mentor and support junior team members.

Requirements

• Bachelor’s or Master’s degree in Computer Science, Electrical/Computer Engineering, or a related field.
• 5+ years of experience in verification of sophisticated PCIe or CXL subsystems or SoCs.
• Solid understanding of digital hardware design and Verilog HDL.
• Experience in PCIe, CXL, and IDE feature verification, including performance analysis.
• Knowledge of System Memory Management Unit (SMMU) and Generic Interrupt Controller (GIC) integration with PCIe.
• Experience working with PCIe & CXL IPs and emulation-friendly transactors.
• Proficiency in simulation and emulation platforms.
• Strong debugging skills using industry-standard debuggers.
• Expertise in UVM-based verification.
• Knowledge of verification strategies, including test plan creation, task tracking, coverage, and sign-off.
• Familiarity with formal verification methodology.

Skills

• Experience with Arm-based designs and/or ARM system architectures (nice to have).
• Clock domain crossing verification (nice to have).
• Power-aware verification (nice to have).
• Proficiency in Perl, Python, or other scripting languages (nice to have).
• Innovation with AI tools like Codex (nice to have).

Benefits

• Culture-driven behaviors: partner and customer focus, collaboration, creativity, innovation, personal development, impact, and delivering on promises.
• Competitive and equitable total reward package, with salary as one component.
• Hybrid working framework, empowering teams to determine their own patterns based on work needs.
• Accommodations and adjustments during the recruitment process, treated with confidentiality.

Pay

Salary range: $161,500–$218,500 per year.

No relocation package is available for this role.