Jobs · Information Technology · California

Package Design Methodology Engineer

NVIDIA AI · Santa Clara, CA · 1 mo ago
Information TechnologyFull-time

About the role

The NVIDIA's Advanced Package Engineering team is expanding, looking for an experienced engineer to design and implement VLSI tools for silicon and substrate design. This role involves developing applications, flows, and methodologies to construct, analyze, and validate package designs.

Responsibilities

  • Work with world-class engineers to design and implement VLSI tools for silicon and substrate design.
  • Develop applications to enable project engineers with an emphasis on maintainability and ease of use.
  • Develop flows/tools and methodologies to construct, analyze, and validate package designs at many different stages in the production flow.
  • Optimize the daily workflows of the world's top package designers.

Requirements

  • A BS in Computer Science, Electrical Engineering, or a related field (or equivalent experience), and 5+ years of flow and methodology development experience building flows for package design used by engineering teams at scale.
  • Good programming fundamentals in Python and/or C++, including proficiency with data structures, algorithms, object-oriented design, and code quality practices.
  • Demonstrated experience applying AI/ML techniques in engineering workflows — this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments.
  • Strong understanding of electrical engineering fundamentals relevant to VLSI package design (signal integrity, power delivery, parasitic extraction, or equivalent).

Qualifications

  • Good understanding of VLSI package design along with interposer and IC physical design.
  • Strong expertise in developing package design flows and methodologies.

Skills

  • Experience with VLSI package design and interposer and IC physical design.
  • Proficiency in Python and/or C++.
  • Experience with AI/ML techniques in engineering workflows.
  • Strong understanding of electrical engineering fundamentals relevant to VLSI package design.

Benefits

  • Comprehensive benefits package including health insurance, retirement plans, and paid time off.
  • Equity options for eligible employees.

Pay

  • Base salary range: $136,000 - $218,500 for Level 3, and $168,000 - $264,500 for Level 4.

Schedule

  • Full-time position.

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