Lead SoC Design Verification Engineer

At InspireSemi, we're not just building chips; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all seamlessly connected. We're driven by a mission to make high performance computing more accessible, energy-efficient, and easier for developers to harness. Ready to make a real impact? Join our passionate team!

About the role

We are looking for a seasoned Lead SoC Verification Engineer to own the complete verification of our innovative Supercomputer cluster-on-a-chip. This critical role encompasses our RISC-V cores, complex network-on-chip, and 3rd-party peripheral IP integrations. You will have significant discretion to choose the most efficient methods and tools to ensure our designs are robust and performant. This is a leadership position where you'll have the opportunity to build out our in-house verification dream team.

Responsibilities

• Craft and execute comprehensive verification plans from the ground up.
• Develop sophisticated unit-level and system-level testbenches.
• Implement and ensure RISC-V ISA compliance testing.
• Conduct preliminary debugging of discovered issues, working closely with the design team.
• Analyze and drive enhancements for functional and code coverage.
• Integrate simulations with real user interfaces, stimulus generators, and checkers.
• Identify performance bottlenecks and opportunities for optimization through verification.
• Continuously innovate and improve our test infrastructure and automation frameworks.
• Manage, mentor, and grow a team of verification engineers.

Requirements

• A Bachelor’s or Master’s degree in Electrical or Computer Engineering.
• 7+ years of hands-on experience in SoC verification.
• A deep understanding of SystemVerilog, UVM, and simulation tools (Xcelium preferred).
• Proven experience interfacing simulations to other software and hardware via DPI/VPI.
• Proficiency with version control (git/Bitbucket) and project tracking (Jira, Confluence).
• Strong knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5, etc.).
• Solid familiarity with CPU architecture and digital design concepts.
• Excellent scripting and programming skills (Python, C/C++, TCL).
• Outstanding communication and collaboration abilities.
• Bonus Points: Experience with formal verification techniques (e.g., Conformal LEC).
• Bonus Points: Hands-on experience with emulation systems (like Zebu or Palladium) or FPGA prototyping.

Benefits

• Competitive salary, bonus potential, and meaningful equity.
• Hybrid work model (with potential for fully remote for exceptional candidates).
• Flexible time off.
• Opportunity to be a pioneer in a hypergrowth startup.